BEGIN:VCALENDAR VERSION:2.0 PRODID:-//CERN//INDICO//EN BEGIN:VEVENT SUMMARY:Practice talks of commen electronics projects for faculty meeting April 25 DTSTART;VALUE=DATE-TIME:20080422T080000Z DTEND;VALUE=DATE-TIME:20080422T093000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-31227@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=31227 LOCATION:CERN 4-R-17 URL:http://indico.cern.ch/conferenceDisplay.py?confId=31227 END:VEVENT BEGIN:VEVENT SUMMARY:3D VLSI integration DTSTART;VALUE=DATE-TIME:20080523T120000Z DTEND;VALUE=DATE-TIME:20080523T130000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-34554@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=34554 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=34554 END:VEVENT BEGIN:VEVENT SUMMARY:Power distribution in future experiments DTSTART;VALUE=DATE-TIME:20080910T070000Z DTEND;VALUE=DATE-TIME:20080910T074500Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39721@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39721 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39721 END:VEVENT BEGIN:VEVENT SUMMARY:SLHC upgrades to ATLAS and its electronics DTSTART;VALUE=DATE-TIME:20080925T070000Z DTEND;VALUE=DATE-TIME:20080925T074500Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39725@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39725 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39725 END:VEVENT BEGIN:VEVENT SUMMARY:TWEPP 2008 summary and Discussion DTSTART;VALUE=DATE-TIME:20081001T070000Z DTEND;VALUE=DATE-TIME:20081001T074500Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39727@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39727 LOCATION:CERN 160-1-009 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39727 END:VEVENT BEGIN:VEVENT SUMMARY:SI-PM and its related electronics DTSTART;VALUE=DATE-TIME:20081015T070000Z DTEND;VALUE=DATE-TIME:20081015T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39730@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39730 LOCATION:CERN 32-1-A24 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39730 END:VEVENT BEGIN:VEVENT SUMMARY:LHCb electronics status and possible upgrades DTSTART;VALUE=DATE-TIME:20081022T070000Z DTEND;VALUE=DATE-TIME:20081022T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39731@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39731 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39731 END:VEVENT BEGIN:VEVENT SUMMARY:Cicorel - Industrial Seminar DTSTART;VALUE=DATE-TIME:20081029T130000Z DTEND;VALUE=DATE-TIME:20081029T150000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-46323@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=46323 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=46323 END:VEVENT BEGIN:VEVENT SUMMARY:New crate/bus standards: ATCA\, uTCA\, VXS and VPX DTSTART;VALUE=DATE-TIME:20081112T080000Z DTEND;VALUE=DATE-TIME:20081112T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39733@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39733 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39733 END:VEVENT BEGIN:VEVENT SUMMARY:CMS electronics and possible upgrades DTSTART;VALUE=DATE-TIME:20081119T080000Z DTEND;VALUE=DATE-TIME:20081119T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39736@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39736 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39736 END:VEVENT BEGIN:VEVENT SUMMARY:The Medipix developments: from HEP experiments to medical and othe r applications and then back again. DTSTART;VALUE=DATE-TIME:20081210T080000Z DTEND;VALUE=DATE-TIME:20081210T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39739@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39739 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39739 END:VEVENT BEGIN:VEVENT SUMMARY:Problems and solutions to the use of FPGA's in radiation zones DTSTART;VALUE=DATE-TIME:20081217T080000Z DTEND;VALUE=DATE-TIME:20081217T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-39740@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=39740 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=39740 END:VEVENT BEGIN:VEVENT SUMMARY:Practical EMC issues in large experiments DTSTART;VALUE=DATE-TIME:20090127T080000Z DTEND;VALUE=DATE-TIME:20090127T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-48124@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=48124 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=48124 END:VEVENT BEGIN:VEVENT SUMMARY:Electronics for applications in space DTSTART;VALUE=DATE-TIME:20090129T100000Z DTEND;VALUE=DATE-TIME:20090129T110000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-48125@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=48125 LOCATION:CERN TH Theory Conference Room URL:http://indico.cern.ch/conferenceDisplay.py?confId=48125 END:VEVENT BEGIN:VEVENT SUMMARY:Link encoding and error correcting codes DTSTART;VALUE=DATE-TIME:20090203T080000Z DTEND;VALUE=DATE-TIME:20090203T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-48127@cern.ch DESCRIPTION:Coding and Error Control Coding is a large field of mathematic s/engineering\nand this seminar gives an elementary introduction to the su bject giving hints and pointers on the subject.\nThe seminar will cover ba sic coding schemes with their specific characteristics and will not cover their particular electronics implementation.\n\nhttp://indico.cern.ch/conf erenceDisplay.py?confId=48127 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=48127 END:VEVENT BEGIN:VEVENT SUMMARY:IEDM summary and outlook DTSTART;VALUE=DATE-TIME:20090219T080000Z DTEND;VALUE=DATE-TIME:20090219T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-49285@cern.ch DESCRIPTION:The International Electron Devices Meeting is the annual confe rence where industry and academia present their research and development w ork on semiconductor devices and technology. This conference gives an ove rview of the state of the art in this area and the future trends. \nThe pr esentation will give an overview of the evolution of CMOS technology\, its shrinking to smaller and smaller dimensions\, and the technological trick s and challenges to achieve this in the transistors\, the lithography and the metallization (including 3D interconnect technology allowing stacking of chips). Some trends in memories and some papers on specific topics will also be discussed.\nAn effort has been made to make it an overview showin g trends interesting for a more general public.\n\nhttp://indico.cern.ch/c onferenceDisplay.py?confId=49285 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=49285 END:VEVENT BEGIN:VEVENT SUMMARY:Rad hard optical link for readout of future experiments (DG white paper project) DTSTART;VALUE=DATE-TIME:20090224T080000Z DTEND;VALUE=DATE-TIME:20090224T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-48129@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=48129 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=48129 END:VEVENT BEGIN:VEVENT SUMMARY:Summary from ISSCC09 DTSTART;VALUE=DATE-TIME:20090310T080000Z DTEND;VALUE=DATE-TIME:20090310T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-48130@cern.ch DESCRIPTION:The seminar will offer a summary from the International Solid State Circuit Conference 2009\, where the main theme was reduction of powe r consumption on integrated circuits.\n\nhttp://indico.cern.ch/conferenceD isplay.py?confId=48130 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=48130 END:VEVENT BEGIN:VEVENT SUMMARY:Fast time tagging silicon pixel tracker\, The NA62 gigatracker DTSTART;VALUE=DATE-TIME:20090317T080000Z DTEND;VALUE=DATE-TIME:20090317T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-48133@cern.ch DESCRIPTION:The Gigatracker is a novel silicon pixel tracker with ~100ps t ime resolution for use in NA62 and with potential future use in CLIC detec tors. The proposed gigatracker detector and its dedicated fast readout ele ctronics will be described.\n\nhttp://indico.cern.ch/conferenceDisplay.py? confId=48133 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=48133 END:VEVENT BEGIN:VEVENT SUMMARY:Step-by-step manufacturing of ULSI CMOS technologies DTSTART;VALUE=DATE-TIME:20090331T070000Z DTEND;VALUE=DATE-TIME:20090331T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-48132@cern.ch DESCRIPTION:This is a short course on manufacturing of CMOS technologies. Fundamental manufacturing operations will be presented first\, followed by a full step-by-step process flow for a modern CMOS technology using full- copper metallization.\n\nhttp://indico.cern.ch/conferenceDisplay.py?confId =48132 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=48132 END:VEVENT BEGIN:VEVENT SUMMARY:High speed design in a chassis environment DTSTART;VALUE=DATE-TIME:20090429T070000Z DTEND;VALUE=DATE-TIME:20090429T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-54447@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=54447 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=54447 END:VEVENT BEGIN:VEVENT SUMMARY:High speed optical links and networks\, today and tomorrow DTSTART;VALUE=DATE-TIME:20090512T070000Z DTEND;VALUE=DATE-TIME:20090512T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-48135@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=48135 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=48135 END:VEVENT BEGIN:VEVENT SUMMARY:Designing and producing reliable PCB's DTSTART;VALUE=DATE-TIME:20090526T070000Z DTEND;VALUE=DATE-TIME:20090526T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-57606@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=57606 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=57606 END:VEVENT BEGIN:VEVENT SUMMARY:The where\, why and how of optical access DTSTART;VALUE=DATE-TIME:20090616T070000Z DTEND;VALUE=DATE-TIME:20090616T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-59761@cern.ch DESCRIPTION:Abstract: This presentation will look at the requirement for a nd the current progress in optical fibre access\, with a particular focus on fibre to the home. It will discuss the technologies that are currently being installed across Europe and the rest of the world and consider why a number of standards are competing in different markets and why progress r ates differ widely. It will also introduce the technologies that are being researched and standardised for the next generation of optical access.\n\ nBio: Dr John Mitchell received his BEng in Electronic and Electrical Eng ineering and PhD from the Department of Electronic Engineering at Universi ty College London in 1996 and 2000 respectively. In 2000 he was appointed as a Lecturer in the department of Electronic Engineering at University Co llege London\, becoming Senior Lecturer in 2006. His research has focused on optical access networks and radio over fibre network technologies. In a project funded BT he was involved in the design of the long-reach optical access netwok (LROAN) which offered 10Gbit/s over 100km to 1024 users. He has given a number of invited lectures on optical access and Radio-over-f ibre networks\, and currently leads the Virtual Centre of Excellence in Ac cess in the EU FP7 Project BONE.\n\nJohn Mitchell is giving this seminar w ith support from ACEOLE\, a Marie Curie Action at CERN funded by the Europ ean Commission\n\nhttp://indico.cern.ch/conferenceDisplay.py?confId=59761 LOCATION:CERN 4-3-006 TH Theory Conference Room URL:http://indico.cern.ch/conferenceDisplay.py?confId=59761 END:VEVENT BEGIN:VEVENT SUMMARY:TWEPP2009 summary DTSTART;VALUE=DATE-TIME:20091027T080000Z DTEND;VALUE=DATE-TIME:20091027T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69660@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69660 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69660 END:VEVENT BEGIN:VEVENT SUMMARY:Beam condition monitors with their diamond detectors DTSTART;VALUE=DATE-TIME:20091103T080000Z DTEND;VALUE=DATE-TIME:20091103T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69661@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69661 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69661 END:VEVENT BEGIN:VEVENT SUMMARY:NSS2009 summary DTSTART;VALUE=DATE-TIME:20091110T080000Z DTEND;VALUE=DATE-TIME:20091110T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69662@cern.ch DESCRIPTION:Summary of NSS2009:\nhttp://www.nss-mic.org/2009/NSSMain.asp \ nWith main emphasis on ASIC's\, Interconnect and SiPM.\n\nhttp://indico.ce rn.ch/conferenceDisplay.py?confId=69662 LOCATION:CERN 40-S2-D01 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69662 END:VEVENT BEGIN:VEVENT SUMMARY:PON and its possible use in HEP DTSTART;VALUE=DATE-TIME:20091124T080000Z DTEND;VALUE=DATE-TIME:20091124T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69665@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69665 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69665 END:VEVENT BEGIN:VEVENT SUMMARY:Silicon strip detectors and its readout electronics DTSTART;VALUE=DATE-TIME:20091201T080000Z DTEND;VALUE=DATE-TIME:20091201T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69666@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69666 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69666 END:VEVENT BEGIN:VEVENT SUMMARY:Quantum Cryptography - A reality today DTSTART;VALUE=DATE-TIME:20091203T080000Z DTEND;VALUE=DATE-TIME:20091203T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-71768@cern.ch DESCRIPTION:Quantum Cryptography is probably the most mature technology wh ich emerged from the field of quantum information processing and computing . This technology allows to exploit the laws of quantum physics to secure the communications taking place over an optical network. After being propo sed in the 80's\, the first demonstrations took place in the 90's and the first products became available at the beginning of the new century. In th is presentation\, we will first explain the principles behind quantum cryp tography and explain where it fits\, at the border of the fields of optica l communications and information security. We will then look at the resear ch state of the art and the existing products\, as well as current applica tions. Finally\, we will discuss in what directions research will move.\n\ nhttp://indico.cern.ch/conferenceDisplay.py?confId=71768 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=71768 END:VEVENT BEGIN:VEVENT SUMMARY:Superconducting ASIC technologies (CANCELLED\, DELAYED) DTSTART;VALUE=DATE-TIME:20091207T080000Z DTEND;VALUE=DATE-TIME:20091207T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-71625@cern.ch DESCRIPTION:Signal switching of superconducting digital and analog ASIC ci rcuits (Rapid single flux quantum -RSFQ- based circuits) are based on the quantum effects of superconducting materials. Since RSFQ circuits are base d on the superconductivity\, cryogenic environment is needed for their ope ration. The basic advantages of RSFQ over their CMOS equivalents are the s witching ability at THz frequencies and much lower power consumption. Furt hermore\, RSFQ technology is compatible with the standard CMOS design and production systems hence the integration of RSFQ circuits with CMOS and op tical based circuits is not impossible. \nThe report titled "Superconducti ng Technology Assessment" of the US National Security Agency (NSA) states that "The government\, and particularly NSA\, has a continuing need for ev er-increasing computational power. The Agency is concerned about projected limitations of conventional silicon-based technology and is searching for possible alternatives to meet its future mission-critical computational n eeds and RSFQ technology is an excellent candidate for petaflops-scale com puters". \nNote that\, RSFQ circuits should not be considered as a candida te to replace the semiconductor based systems. It mainly is considered as a complementary technology where the semiconductor technology is inadequat e. In the recent decade\, the developments in the design and production ar ea enabled the demonstration of RSFQ technology in potential real life app lications such as microprocessors\, network routers\, ADC circuits by seve ral groups so far. \nIn this presentation\, we will make a brief overview of the circuit operation\, logic representation of the RSFQ cells\, design procedure\, pros and cons compared to semiconductor technologies and curr ent engineering practices.\n\nhttp://indico.cern.ch/conferenceDisplay.py?c onfId=71625 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=71625 END:VEVENT BEGIN:VEVENT SUMMARY:Challenges and advantages making analog front-ends in deep submicr on technologies DTSTART;VALUE=DATE-TIME:20091208T080000Z DTEND;VALUE=DATE-TIME:20091208T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69667@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69667 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69667 END:VEVENT BEGIN:VEVENT SUMMARY:Monolithic pixel detectors DTSTART;VALUE=DATE-TIME:20091215T080000Z DTEND;VALUE=DATE-TIME:20091215T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69668@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69668 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69668 END:VEVENT BEGIN:VEVENT SUMMARY:High Density Interconnect Technologies in Silicon DTSTART;VALUE=DATE-TIME:20100112T080000Z DTEND;VALUE=DATE-TIME:20100112T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69672@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69672 LOCATION:CERN TH Theory Conference Room URL:http://indico.cern.ch/conferenceDisplay.py?confId=69672 END:VEVENT BEGIN:VEVENT SUMMARY:Radiation hardness of deep sub-micron CMOS technologies DTSTART;VALUE=DATE-TIME:20100119T080000Z DTEND;VALUE=DATE-TIME:20100119T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69673@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69673 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69673 END:VEVENT BEGIN:VEVENT SUMMARY:Power Electronics in Photovoltaic Applications DTSTART;VALUE=DATE-TIME:20100128T080000Z DTEND;VALUE=DATE-TIME:20100128T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-82031@cern.ch DESCRIPTION:The talk will present the fundamental components of grid conne cted photovoltaic systems. Starting from the basic p-n junction photovolta ic (PV) cell\, the currently available silicon PV modules will be presente d and modelled. Some of the power converter topologies\, that are employed to process the energy flowing from the PV generators and to inject it int o the utility grid\, are successively discussed. Finally\, a brief introdu ction to the main control issues that are typically encountered in this ap plication field will be given.\n\nhttp://indico.cern.ch/conferenceDisplay. py?confId=82031 LOCATION:CERN 160-1-009 URL:http://indico.cern.ch/conferenceDisplay.py?confId=82031 END:VEVENT BEGIN:VEVENT SUMMARY:White Rabbit time distribution system and common platform for mach ine instrumentation DTSTART;VALUE=DATE-TIME:20100202T080000Z DTEND;VALUE=DATE-TIME:20100202T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-71163@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=71163 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=71163 END:VEVENT BEGIN:VEVENT SUMMARY:Test and Design for Testability of Analogue and Mixed-Signal Circu its (1/2) DTSTART;VALUE=DATE-TIME:20100204T080000Z DTEND;VALUE=DATE-TIME:20100204T110000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-78641@cern.ch DESCRIPTION:In the last decade one has witnessed a continuous improvement of electronic circuits manufacturing processes\, and the increase of integ rated circuits levels of integration. According to the Semiconductor Indus try Association (SIA) in 2004 the semiconductor industry manufactured more transistors than the global production of grains of rice\, and at a lower production cost.\n\nComplete systems involving digital\, analog and radio -frequency (RF) circuits can now be implemented on a single semiconductor chip. However\, due to high time-to-market demands of these systems-on-chi p (SoC)\, a high stress is being put on test and characterization producti on operations. Conventional test approaches are unable to cope with the te st requirements of different functional cores deeply embedded in complex s ystems due to\, namely\, the high percentage these operations represent in the final product costs. E.g.\, the test of RF functions in SoC may repre sent 40 % of production costs (ITRS 2003).\n\nThe objective of this short course is to give an overview on the economic and technical issues involve d in testing deeply embedded analogue and mixed-signal circuits\, as well as on the methodologies that have been proposed to tackle them. The course contents will be divided in five main parts: \n- basic concepts on testin g and design for testability\; \n- defect\, fault modeling and test metric s\; \n- structural and functional test based design for testability and bu ilt-in self-test approaches\; \n- standard test infrastructures\; \n- digi tal signal processing based testing.\n\nhttp://indico.cern.ch/conferenceDi splay.py?confId=78641 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=78641 END:VEVENT BEGIN:VEVENT SUMMARY:Test and Design for Testability of Analogue and Mixed-Signal Circu its (2/2) DTSTART;VALUE=DATE-TIME:20100205T080000Z DTEND;VALUE=DATE-TIME:20100205T110000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-78642@cern.ch DESCRIPTION:In the last decade one has witnessed a continuous improvement of electronic circuits manufacturing processes\, and the increase of integ rated circuits levels of integration. According to the Semiconductor Indus try Association (SIA) in 2004 the semiconductor industry manufactured more transistors than the global production of grains of rice\, and at a lower production cost.\n\nComplete systems involving digital\, analog and radio -frequency (RF) circuits can now be implemented on a single semiconductor chip. However\, due to high time-to-market demands of these systems-on-chi p (SoC)\, a high stress is being put on test and characterization producti on operations. Conventional test approaches are unable to cope with the te st requirements of different functional cores deeply embedded in complex s ystems due to\, namely\, the high percentage these operations represent in the final product costs. E.g.\, the test of RF functions in SoC may repre sent 40 % of production costs (ITRS 2003).\n\nThe objective of this short course is to give an overview on the economic and technical issues involve d in testing deeply embedded analogue and mixed-signal circuits\, as well as on the methodologies that have been proposed to tackle them. The course contents will be divided in five main parts: \n- basic concepts on testin g and design for testability\; \n- defect\, fault modeling and test metric s\; \n- structural and functional test based design for testability and bu ilt-in self-test approaches\; \n- standard test infrastructures\; \n- digi tal signal processing based testing.\n\nhttp://indico.cern.ch/conferenceDi splay.py?confId=78642 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=78642 END:VEVENT BEGIN:VEVENT SUMMARY:Seminar: Optical sources\, photodectors and device characterizatio n DTSTART;VALUE=DATE-TIME:20100209T080000Z DTEND;VALUE=DATE-TIME:20100209T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-70381@cern.ch DESCRIPTION:In this seminar the principles of operation of optical sources and photodetectors will be outlined. Emphasis will be given on semiconduc tor lasers: the different available structures (FP\, DFB\, VCSELS) will be discussed and techniques for modeling these devices will be presented.\nA dditionally\, techniques based on the S-parameters for experimental charac terization of optical sources and photodiodes will be described.\nTo concl ude some recent results obtained within the ACEOLE project will be present ed on the extraction of laser diode parameters from experimental data.\n\n The seminar will be followed by a tutorial on Extraction and optimization of intrinsic semiconductor laser parameters at 10h30\n\nhttp://indico.cern .ch/conferenceDisplay.py?confId=70381 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=70381 END:VEVENT BEGIN:VEVENT SUMMARY:Tutorial: Extraction and optimization of intrinsic semiconductor l aser parameters DTSTART;VALUE=DATE-TIME:20100209T093000Z DTEND;VALUE=DATE-TIME:20100209T110000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-82529@cern.ch DESCRIPTION:The model of the laser diode based on the single-mode rate equ ations will be presented. The S-parameter technique will also be described . With this background the frequency response subtraction technique is dis cussed as a means to extract the intrinsic laser parameters from measured data on packaged devices. Techniques for extraction of chip and package p arasitics is also presented. Results obtained within the framework of ACEO LE workpackage 4.2 "Characterization of semiconductor lasers" will be pres ented aimed at optimizing the transmitter circuit of the versatile link pr oject.\n\nThis tutorial follows the seminar given at 9h00.\n\nhttp://indic o.cern.ch/conferenceDisplay.py?confId=82529 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=82529 END:VEVENT BEGIN:VEVENT SUMMARY:Run-Time Reconfiguration of Hardware (1/2) DTSTART;VALUE=DATE-TIME:20100225T080000Z DTEND;VALUE=DATE-TIME:20100225T110000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-78644@cern.ch DESCRIPTION:The widespread adoption of SRAM-based field-programmable devic es has made run-time reconfiguration (RTR) a viable and attractive approac h to digital systems organization. RTR comes with the promise of enabling more efficient computing systems thanks to improved hardware utilization\, better performance and lower power consumption. Another outstanding chara cteristic of this approach is the flexibility it brings to digital systems \, opening the way for adaptive high-performance designs. However\, outsid e of research-oriented environments RTR has enjoyed only limited acceptanc e and reduced industrial impact.\n\nThis short course will provide an intr oduction to the state-of-the-art in run-time reconfiguration\, including d evice-level support for RTR\, methodologies and design flows\, achievable performance improvement\, and real-world limitations. It will close with a discussion of the obstacles to mainstream adoption of RTR and a descripti on of open research issues.\n\nhttp://indico.cern.ch/conferenceDisplay.py? confId=78644 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=78644 END:VEVENT BEGIN:VEVENT SUMMARY:Run-Time Reconfiguration of Hardware (2/2) DTSTART;VALUE=DATE-TIME:20100226T080000Z DTEND;VALUE=DATE-TIME:20100226T110000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-78645@cern.ch DESCRIPTION:The widespread adoption of SRAM-based field-programmable devic es has made run-time reconfiguration (RTR) a viable and attractive approac h to digital systems organization. RTR comes with the promise of enabling more efficient computing systems thanks to improved hardware utilization\, better performance and lower power consumption. Another outstanding chara cteristic of this approach is the flexibility it brings to digital systems \, opening the way for adaptive high-performance designs. However\, outsid e of research-oriented environments RTR has enjoyed only limited acceptanc e and reduced industrial impact.\n\nThis short course will provide an intr oduction to the state-of-the-art in run-time reconfiguration\, including d evice-level support for RTR\, methodologies and design flows\, achievable performance improvement\, and real-world limitations. It will close with a discussion of the obstacles to mainstream adoption of RTR and a descripti on of open research issues.\n\nhttp://indico.cern.ch/conferenceDisplay.py? confId=78645 LOCATION:CERN 160-1-009 URL:http://indico.cern.ch/conferenceDisplay.py?confId=78645 END:VEVENT BEGIN:VEVENT SUMMARY:CAE tools and technology challenges in making deep sub-micron IC d esigns DTSTART;VALUE=DATE-TIME:20100330T070000Z DTEND;VALUE=DATE-TIME:20100330T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69676@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69676 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69676 END:VEVENT BEGIN:VEVENT SUMMARY:Radiation effects on opto-electronics DTSTART;VALUE=DATE-TIME:20100420T070000Z DTEND;VALUE=DATE-TIME:20100420T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-69693@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=69693 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=69693 END:VEVENT BEGIN:VEVENT SUMMARY:Design for Manufacturability & Reliability DTSTART;VALUE=DATE-TIME:20100607T080000Z DTEND;VALUE=DATE-TIME:20100607T160000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-94908@cern.ch DESCRIPTION:\n Seminar given by Dr Craig Hillman (DFR Solutions)\n\n Prel iminary agenda:\n\n Introduction to Design for Excellence\n     Motivat ion for DfX\n     Setting up a DfX team\n Design for Manufacturability\ n     Introduction\n     Industry Standard Design Rules\n     Pri nted Board\n     Solder Assembly\n     Component Technology and Pack aging (BGA\, QFN\, CSP\, etc.)\n Design for Reliability\n     Introduct ion\n     Interconnect Strategies\n     Classic DfR Tools (FMEA\, de rating\, etc)\n     DfR by Component Technoligy\n     Physics of Fai lure\n Design for Environment\n     Environmental Compliance Legislatio n\n     Challenges of new materials (2nd gen Pb-free solder\, halogen-f ree\,etc)\n     Energy Consumption and Efficiency Requirements\n     Challenges of new environments (free air cooling\, power down\,etc.)\n      Environmental Packaging (minimize\, reuse\, recycle)\n     Disposa l Planning\n     Design for disassembly\, design for serviceability\n S ummary and Open Discussions\n\n Slides available at https://espace.cern.ch /ph-dep-ese-tsdem/Reliability/Forms/AllItems.aspx (protected)\n\n Useful i nformation can be found on DfR Solutions site:\n http://www.dfrsolutions.c om/\n\n This event is sponsored by ACEOLE. ACEOLE is a Marie Curie Action at CERN\, funded by the European Commission under the 7th Framework Progra m.\n\n  \n\nhttp://indico.cern.ch/conferenceDisplay.py?confId=94908 LOCATION:CERN IT Auditorium URL:http://indico.cern.ch/conferenceDisplay.py?confId=94908 END:VEVENT BEGIN:VEVENT SUMMARY:Highlights from the International Interconnect Conference 2010 DTSTART;VALUE=DATE-TIME:20100622T070000Z DTEND;VALUE=DATE-TIME:20100622T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-98390@cern.ch DESCRIPTION:Highligths from: http://www.his.com/~iitc/info.html\n\nhttp:// indico.cern.ch/conferenceDisplay.py?confId=98390 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=98390 END:VEVENT BEGIN:VEVENT SUMMARY:Power Converters: Why commercial world is betting on Gallium Nitri de (GaN) to replace Silicon DTSTART;VALUE=DATE-TIME:20100914T070000Z DTEND;VALUE=DATE-TIME:20100914T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-103647@cern.ch DESCRIPTION:Gallium Nitride (GaN) is a high band gap material\; the HEMPT (high electron mobility transistor) has been used since 2004 for Cellular base station power amplifiers. \nNow with the development of GaN epitaxial growth on silicon using existing foundries\, low cost power devices becom e possible.\n \nIt has many advantages for power applications due to low R ds (drain to source resistance) high voltage operation due to high dielect ric strength. This can result in thinner devices with high thermal conduct ivity.\nSome of the commercial applications being targeted are data center 400 DC distributions\, Electric automobiles\, air conditioner motors\, AC line plug _in power supplies etc.\n\nWe have found the depletion mode dev ices to be radiation hard. In the past few months enhancement power device s have become available and in our tests for DC -DC converters\, these hav e 90% efficiency at high voltage ratios than is possible with silicon conv erters.\n\nOur experience with this material and the current status of the commercial activity shall be covered.\nYale web site for further reading http://shaktipower.sites.yale.edu/\n\nhttp://indico.cern.ch/conferenceDisp lay.py?confId=103647 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=103647 END:VEVENT BEGIN:VEVENT SUMMARY:Medipix2 and Timepix: applications at CERN DTSTART;VALUE=DATE-TIME:20100928T070000Z DTEND;VALUE=DATE-TIME:20100928T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-107171@cern.ch DESCRIPTION:The seminar begins with a review of the detector systems which have been developed in the framework of the Medipix2 Collaboration. A bri ef overview of applications in industry and academic research ranging from materials analysis to medical x-ray imaging will be presented. The device s are in use in a number of applications at CERN. Atlas and CMS have speci ally modified detectors for measuring background radiation and in particul ar neutrons in real time. Similar measurements are being carried out at CE RF and CNGS. At ISOLDE electron channeling experiments are taking place. A t the SPS the devices are being used as active channelled beam monitors in the framework of the UA9 experiment and are being tested as high sensitiv ity beam loss monitors. These applications will be described in more detai l. Finally ongoing and future developments will be introduced and their po ssible applications outlined.\n\nhttp://indico.cern.ch/conferenceDisplay.p y?confId=107171 LOCATION:CERN Salle Curie URL:http://indico.cern.ch/conferenceDisplay.py?confId=107171 END:VEVENT BEGIN:VEVENT SUMMARY:TWEPP2010: Summary and discussion DTSTART;VALUE=DATE-TIME:20101005T070000Z DTEND;VALUE=DATE-TIME:20101005T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-104111@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=104111 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=104111 END:VEVENT BEGIN:VEVENT SUMMARY:XTCA: physics profile and use DTSTART;VALUE=DATE-TIME:20101012T070000Z DTEND;VALUE=DATE-TIME:20101012T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-104028@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=104028 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=104028 END:VEVENT BEGIN:VEVENT SUMMARY:CMS Tracker performance and its electronics DTSTART;VALUE=DATE-TIME:20101019T070000Z DTEND;VALUE=DATE-TIME:20101019T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-101979@cern.ch DESCRIPTION:I will present a short history of the design and construction of the CMS tracker\, with some recent results on the performance. I will t ry to relate important aspects of the performance to the engineering desig n\, especially the electronics.\n\nhttp://indico.cern.ch/conferenceDisplay .py?confId=101979 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=101979 END:VEVENT BEGIN:VEVENT SUMMARY:CICC summary DTSTART;VALUE=DATE-TIME:20101102T080000Z DTEND;VALUE=DATE-TIME:20101102T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-103699@cern.ch DESCRIPTION:Summary of Custom Integrated Circuits Conference: \nhttp://www .ieee-cicc.org/home.html\n\nhttp://indico.cern.ch/conferenceDisplay.py?con fId=103699 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=103699 END:VEVENT BEGIN:VEVENT SUMMARY:A low power 6.4Gb/s synchronous receiver core in 65nm DTSTART;VALUE=DATE-TIME:20101109T090000Z DTEND;VALUE=DATE-TIME:20101109T100000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-103144@cern.ch DESCRIPTION:The presentation will cover the design and performance of a lo w power (4.5mW/Gb/s) 6.4Gb/s 22+1-Lane Source-Synchronous Link RX Core wit h Optional Cleanup PLL in 65nm CMOS. \nA short overview of the Swiss compa ny Miromico\, making IP blocks\, will also be presented.\n\nhttp://indico. cern.ch/conferenceDisplay.py?confId=103144 LOCATION:CERN 6-2-004 URL:http://indico.cern.ch/conferenceDisplay.py?confId=103144 END:VEVENT BEGIN:VEVENT SUMMARY:Prospects for future high speed optical interconnects DTSTART;VALUE=DATE-TIME:20101116T080000Z DTEND;VALUE=DATE-TIME:20101116T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-104027@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=104027 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=104027 END:VEVENT BEGIN:VEVENT SUMMARY:Detector and front-end electronics issues: Qualification and relia bility testing DTSTART;VALUE=DATE-TIME:20101123T080000Z DTEND;VALUE=DATE-TIME:20101123T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-103749@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=103749 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=103749 END:VEVENT BEGIN:VEVENT SUMMARY:Technology Transfer at CERN : the why and how and what’s in it f or you. DTSTART;VALUE=DATE-TIME:20101130T080000Z DTEND;VALUE=DATE-TIME:20101130T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-114480@cern.ch DESCRIPTION:The past year has been marked by several important development s in Knowledge and Technology Transfer (KTT) activities at CERN. A new Int ellectual Property Policy and new financial incentives (including the KTT Fund) have been introduced\, and 5 new people have been integrated into th e existing team. It is time to tell you more in detail about all these imp ortant steps forward\, in particular how the TT process works\, what is yo ur role in it and what are the services provided by the KTT Group.\n\nhttp ://indico.cern.ch/conferenceDisplay.py?confId=114480 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=114480 END:VEVENT BEGIN:VEVENT SUMMARY:LHCb vertex detector and its electronics: Current and future upgra des DTSTART;VALUE=DATE-TIME:20101214T080000Z DTEND;VALUE=DATE-TIME:20101214T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-107205@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=107205 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=107205 END:VEVENT BEGIN:VEVENT SUMMARY:IEDM summary DTSTART;VALUE=DATE-TIME:20110208T080000Z DTEND;VALUE=DATE-TIME:20110208T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121648@cern.ch DESCRIPTION:International Electron Devices Meeting 2010 summary and outloo k\nThe International Electron Devices Meeting is the annual conference whe re industry and academia present their research and development work on se miconductor devices and technology.  This conference gives an overview of the state of the art in this area and the future trends.\nThe presentatio n will give an overview of the evolution of CMOS technology\, its shrinkin g to smaller and smaller dimensions\, and the technological tricks and cha llenges to achieve this in the transistors\, the lithography and the metal lization (including 3D interconnect technology allowing stacking of chips) . Some trends in memories and some papers on specific topics will also be discussed.\nAn effort has been made to make it an overview showing trends interesting for a more general public.\n\nhttp://indico.cern.ch/conference Display.py?confId=121648 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121648 END:VEVENT BEGIN:VEVENT SUMMARY:Design and simulation of high speed links on boards and backplanes DTSTART;VALUE=DATE-TIME:20110215T080000Z DTEND;VALUE=DATE-TIME:20110215T091500Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-110382@cern.ch DESCRIPTION:Jean-Pierre Cachemiche (~45min): Basic principles of specific signal integrity issues related to high speed signal transmission will be summarized to show how these principles can be converted into specific rou ting rules for PCB's.\nSimulation and measurement methods will be describe d and the advantages/difficulties of each discussed. A practical example w ill be used to correlate simulations with real measurements.\nDavid Porret (15min): An example of the simulation of the signal transmission of a 4.8 Gbits/s signal to the GBT ASIC via the IC package and the test board will be presented and compared to measurements.\n\nhttp://indico.cern.ch/confer enceDisplay.py?confId=110382 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=110382 END:VEVENT BEGIN:VEVENT SUMMARY:Straw detectors and their electronics DTSTART;VALUE=DATE-TIME:20110222T080000Z DTEND;VALUE=DATE-TIME:20110222T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121649@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=121649 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121649 END:VEVENT BEGIN:VEVENT SUMMARY:The new ATLAS pixel chip: FEI4 DTSTART;VALUE=DATE-TIME:20110308T080000Z DTEND;VALUE=DATE-TIME:20110308T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121650@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=121650 LOCATION:CERN TH Theory Conference Room URL:http://indico.cern.ch/conferenceDisplay.py?confId=121650 END:VEVENT BEGIN:VEVENT SUMMARY:High speed serial interconnect and it's use with FPGA's - Practica l introduction to PCI Express with FPGAs DTSTART;VALUE=DATE-TIME:20110322T080000Z DTEND;VALUE=DATE-TIME:20110322T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121654@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=121654 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121654 END:VEVENT BEGIN:VEVENT SUMMARY:Single Photon avalanche diode pixel detectors with high time resol ution DTSTART;VALUE=DATE-TIME:20110329T070000Z DTEND;VALUE=DATE-TIME:20110329T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121655@cern.ch DESCRIPTION:Event supported by the ACEOLE EU training network project\n\nh ttp://indico.cern.ch/conferenceDisplay.py?confId=121655 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121655 END:VEVENT BEGIN:VEVENT SUMMARY:CMS HCAL upgrade and its electronics DTSTART;VALUE=DATE-TIME:20110405T070000Z DTEND;VALUE=DATE-TIME:20110405T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121656@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=121656 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121656 END:VEVENT BEGIN:VEVENT SUMMARY:55 - 65Gs/s ADC's and DAC's in CMOS technology DTSTART;VALUE=DATE-TIME:20110412T083000Z DTEND;VALUE=DATE-TIME:20110412T093000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121657@cern.ch DESCRIPTION:This talk describes how the world’s fastest ADCs and DACs ar e realised in standard CMOS processes\, how they can be integrated with DS Ps with processing power of tens of TeraOPS\, what the performance limits are both now and in the future\, and how they might be applied to ultrafas t signal acquisition and generation.\n\nhttp://indico.cern.ch/conferenceDi splay.py?confId=121657 LOCATION:CERN Salle Andersson URL:http://indico.cern.ch/conferenceDisplay.py?confId=121657 END:VEVENT BEGIN:VEVENT SUMMARY:Radiation tolerance activities in the LHC machine DTSTART;VALUE=DATE-TIME:20110419T070000Z DTEND;VALUE=DATE-TIME:20110419T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121658@cern.ch DESCRIPTION:Radiation field & related monitoring in the LHC machine\nPredi ctions based on Monte-Carlo codes and respective benchmarking\nCommercial equipment/systems and challenges\nMitigation approach\nTest facilities and installations \nLessons learned\n\nhttp://indico.cern.ch/conferenceDispla y.py?confId=121658 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121658 END:VEVENT BEGIN:VEVENT SUMMARY:Test\, characterization and performance of a ~100ps pixel detector (NA62 GTK) DTSTART;VALUE=DATE-TIME:20110503T070000Z DTEND;VALUE=DATE-TIME:20110503T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121659@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=121659 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121659 END:VEVENT BEGIN:VEVENT SUMMARY:Soft-error-rate prediction for programmable circuits: methodology\ , tools and studied cases DTSTART;VALUE=DATE-TIME:20110531T073000Z DTEND;VALUE=DATE-TIME:20110531T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121663@cern.ch DESCRIPTION:Supported by ACEOLE\, a Marie Curie Action at CERN funded by t he European Commission under the 7th Framework Programme\n\nhttp://indico. cern.ch/conferenceDisplay.py?confId=121663 LOCATION:CERN Salle Bohr URL:http://indico.cern.ch/conferenceDisplay.py?confId=121663 END:VEVENT BEGIN:VEVENT SUMMARY:Design Challenges and Future Directions of Low-power High-Speed I/ Os DTSTART;VALUE=DATE-TIME:20110601T090000Z DTEND;VALUE=DATE-TIME:20110601T100000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121660@cern.ch DESCRIPTION:Low-power high-density I/Os are key components of every comput er system. In this talk I will describe the design challenges for implemen ting the physical layer of such circuits in modern CMOS technologies. Star ting with a short introduction to the topic\, where I classify I/O links i nto source-synchronous and CDR based links\, I will then describe some imp ortant standards like HT-3 and OIF CEI-25-LR. In the following\, I will pr esent an example implementation of a product level source-synchronous link .\nNext I will discuss several important design challenges: These are\, on the transmitter side\, how to achieve a high output swing and high speed besides low-power. On the receiver side\, main challenges are achieving th e required bandwidth and low power consumption for a decision-feedback eq ualizer (DFE) implementation. Looking further ahead\, I will discuss futur e ADC-based I/Os using digital equalizers\, and finish my talk by comparin g them with currently used analog implementations.\n\nhttp://indico.cern.c h/conferenceDisplay.py?confId=121660 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121660 END:VEVENT BEGIN:VEVENT SUMMARY:IC packaging DTSTART;VALUE=DATE-TIME:20110607T070000Z DTEND;VALUE=DATE-TIME:20110607T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121664@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=121664 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121664 END:VEVENT BEGIN:VEVENT SUMMARY:Optical Receivers with Integrated Photodiode in Nanoscale CMOS DTSTART;VALUE=DATE-TIME:20110614T070000Z DTEND;VALUE=DATE-TIME:20110614T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-121665@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=121665 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=121665 END:VEVENT BEGIN:VEVENT SUMMARY:Use of DC/DC converters and EMC issues DTSTART;VALUE=DATE-TIME:20110621T070000Z DTEND;VALUE=DATE-TIME:20110621T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-138454@cern.ch DESCRIPTION:The upgrade of the Large Hadron Collider (LHC) experiments at CERN sets new challenges for the powering of the detectors. One of the pow ering schemes under study is based on DC-DC buck converters mounted on the front-end modules. The hard environmental conditions impose strict restri ctions to the converters in terms of low volume\, radiation and magnetic f ield tolerance. Furthermore\, the noise emission of the switching converte rs must not affect the performance of the powered systems. A study of the sources and paths of noise of a synchronous buck converter has been made f or identifying the critical parameters to reduce their emissions. As proof of principle\, a converter was designed following the PCB layout consider ations proposed and then used for powering a silicon strip module prototyp e for the ATLAS upgrade\, in order to evaluate their compatibility.\n\nhtt p://indico.cern.ch/conferenceDisplay.py?confId=138454 LOCATION:CERN 32-1-A24 URL:http://indico.cern.ch/conferenceDisplay.py?confId=138454 END:VEVENT BEGIN:VEVENT SUMMARY:Monolithic Pixel Detector with SOI technology DTSTART;VALUE=DATE-TIME:20110628T070000Z DTEND;VALUE=DATE-TIME:20110628T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-141422@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=141422 LOCATION:CERN 32-1-A24 URL:http://indico.cern.ch/conferenceDisplay.py?confId=141422 END:VEVENT BEGIN:VEVENT SUMMARY:Integrated DC/DC conversion and radiation hard circuit design DTSTART;VALUE=DATE-TIME:20110902T120000Z DTEND;VALUE=DATE-TIME:20110902T130000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-151092@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=151092 LOCATION:CERN Salle Andersson URL:http://indico.cern.ch/conferenceDisplay.py?confId=151092 END:VEVENT BEGIN:VEVENT SUMMARY:1060nm VCSEL-based 10Gbps/channel parallel optical interconnects DTSTART;VALUE=DATE-TIME:20110923T070000Z DTEND;VALUE=DATE-TIME:20110923T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-151508@cern.ch DESCRIPTION:1060nm VCSEL-based optical interconnects have been proposed to realize lower power\, higher reliability and higher data rate for the nex t generation high capacity systems. A high differential gain of InGaAs/GaA s VCSEL contributes to realize low power and high speed data rate. InGaAs PD has a higher sensitivity of >0.7W/A\, which makes link budget lager. In fiber transmission\, a low chromatic dispersion and a low transmission lo ss at 1060nm enables to extend transmission distance. A low cost conventio nal multimode OM2 fiber can be applicable to 1060nm optical link. This tal k highlights benefits of 1060nm optical interconnects and 1060nm VCSEL/PD- based optical engines\, in a context dominated by 850nm-based devices.\n\n http://indico.cern.ch/conferenceDisplay.py?confId=151508 LOCATION:CERN Salle Andersson URL:http://indico.cern.ch/conferenceDisplay.py?confId=151508 END:VEVENT BEGIN:VEVENT SUMMARY:The dosepix chip DTSTART;VALUE=DATE-TIME:20111011T070000Z DTEND;VALUE=DATE-TIME:20111011T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-155574@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=155574 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=155574 END:VEVENT BEGIN:VEVENT SUMMARY:Reconfigurable FPGAs in radioactive environment DTSTART;VALUE=DATE-TIME:20111018T070000Z DTEND;VALUE=DATE-TIME:20111018T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-152527@cern.ch DESCRIPTION:Reconfigurable FPGAs offer impressive capabilities to designer s. The vast amount of logic resources\, hardwired modules (processor cores \, high-­‐speed serial link\, etc.)\, and large memory arrays are comb ined with the unique capabilities of reconfigure the device on-­the-­fly \, when it is already deployed in the field. The major drawback stemming f rom the reconfiguration capabilities is the intrinsic weakness against ion izing radiations of the on-­chip configuration memory\, storing the infor mation defining the functions the FPGA implements. \nTo leverage reconfigu rable FPGAs in radioactive environments\, despite their sensitivity to rad iations\, a number of architectures have been proposed. However\, in order to meet successfully the designer’s goals\, Electronic Design Automatio n (EDA) tools that automate the implementation of such architectures play a crucial role. \nIn this talk we analyze the challenges that designers ha ve to face when dealing with reconfigurable (SRAM and Flash based) FPGAs i n radioactive environments\, we illustrate the architectures that can be u sed and the corresponding EDA tools. Moreover\, we analyze the weakness of the existing solutions\, and we present possible solutions developed or u nder development at Politecnico di Torino\, Italy. \n\nMassimo Violante\, Associate\, Professor with the Department of Automation and computer Engin eering at Politecnico di Torino\, leads a team focused on developing innov ative solutions for bringing embedded systems based on commercial-­off-­ the-­shelf components to radioactive environments.\n\nhttp://indico.cern. ch/conferenceDisplay.py?confId=152527 LOCATION:CERN 40-5-A01 URL:http://indico.cern.ch/conferenceDisplay.py?confId=152527 END:VEVENT BEGIN:VEVENT SUMMARY:Electrical power distribution in experiments DTSTART;VALUE=DATE-TIME:20111025T070000Z DTEND;VALUE=DATE-TIME:20111025T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-155578@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=155578 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=155578 END:VEVENT BEGIN:VEVENT SUMMARY:The Electronics system of the ALFA Forward Detector for Luminosity Measurements in ATLAS DTSTART;VALUE=DATE-TIME:20111101T080000Z DTEND;VALUE=DATE-TIME:20111101T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-155579@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=155579 LOCATION:CERN Salle Dirac URL:http://indico.cern.ch/conferenceDisplay.py?confId=155579 END:VEVENT BEGIN:VEVENT SUMMARY:The LHC Quench Protection System (QPS) DTSTART;VALUE=DATE-TIME:20111115T080000Z DTEND;VALUE=DATE-TIME:20111115T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-155583@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=155583 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=155583 END:VEVENT BEGIN:VEVENT SUMMARY:The S-ALTRO ADC and DSP based front-end chip DTSTART;VALUE=DATE-TIME:20111129T080000Z DTEND;VALUE=DATE-TIME:20111129T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-155595@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=155595 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=155595 END:VEVENT BEGIN:VEVENT SUMMARY:Timing performance of MCP and other detectors with different front -end architectures DTSTART;VALUE=DATE-TIME:20111130T130000Z DTEND;VALUE=DATE-TIME:20111130T140000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-162339@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=162339 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=162339 END:VEVENT BEGIN:VEVENT SUMMARY:Photonics at VTT & Photonics modules for harsh environments DTSTART;VALUE=DATE-TIME:20120117T080000Z DTEND;VALUE=DATE-TIME:20120117T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-168315@cern.ch DESCRIPTION:VTT develops high-performance photonics components and modules for various applications including optical interconnects and sensors. \nV TT’s unique photonics packaging competences enable high data rates (curr ently up to 10 Gb/s/channel)\, hermetic fiber-optic packages\, and robustn ess for harsh environments\, such as\, wide temperature ranges\, shock and vibration resistance\, and radiation hardness. \nRecently\, VTT developed transmitter and receiver components for intra-satellite communications\, which benefit from reduced EMI issues and savings in mass and volume. The components include ‘SpaceFibre’ transceivers (>6 Gbps) and parallel op tic transceivers with fiber ribbon cables (4x10 Gbps)\, and are based on 8 50-nm VCSEL sources and multimode silica fibers. VTT targets to commercial ise the components also for other harsh environment applications\, includi ng avionics\, military\, and radiation environments.\n\nhttp://indico.cern .ch/conferenceDisplay.py?confId=168315 LOCATION:CERN TH Theory Conference Room URL:http://indico.cern.ch/conferenceDisplay.py?confId=168315 END:VEVENT BEGIN:VEVENT SUMMARY:Toward true lab-on-glass systems with integrated fluidics control and thin film sensors DTSTART;VALUE=DATE-TIME:20120203T080000Z DTEND;VALUE=DATE-TIME:20120203T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-173000@cern.ch DESCRIPTION:In the past years\, Lab-On-Chip systems have shown their relev ance as a powerful instrument to accomplish complex chemical or bio-chemic al analysis on a single device.\nCurrently\, however\, most microfluidic s ystems\, require external desktop instrumentation to operate and interroga te the chip and are sometimes referred as "chip-in-a-lab " rather than lab -on-a-chip. Recently different groups began to address the main issues rel ated to\nfluidics actuation and signal detection moving toward systems tha t do not require additional external instrumentation to perform the analys is.\nIn this framework\, our group is working on the development of system s that can perform on-chip biological assays\, in a stand-alone fashion by integrating all the analytical steps into a single device\, from sample p reparation to detection and quantification of multiple\nbiomarkers simulta neously\, without the need of preliminary off-chip sample pre-treatment pr ocedures and bulky external systems for managing the fluidic flow and for signal\ngeneration and detection.\nSeveral techniques are being investigat ed to reach this goal\, addressing the different aspects of this multidisc iplinary research and learning how each of these aspects is correlated to each other.\n\nhttp://indico.cern.ch/conferenceDisplay.py?confId=173000 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=173000 END:VEVENT BEGIN:VEVENT SUMMARY:The Medipix3.0 chip: lessons learned on matching in vdsm CMOS DTSTART;VALUE=DATE-TIME:20120228T080000Z DTEND;VALUE=DATE-TIME:20120228T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-171725@cern.ch DESCRIPTION:The talk presents the Medipix3.0 version: the motivation for d esigning the chip\, the results of measurements that have been obtained an d the limitations of the chip. One of the limitations is the mismatch from pixel to pixel. An overview of matching will be presented with emphasis o n the effects that appear when using very downscaled technologies. Finally \, the conclusions from the study of the pixel-to-pixel mismatch for the c ase of the Medipix3 chip will be presented.\n\nhttp://indico.cern.ch/confe renceDisplay.py?confId=171725 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=171725 END:VEVENT BEGIN:VEVENT SUMMARY:CLIC experiments and their requirements for detectors and electron ics DTSTART;VALUE=DATE-TIME:20120306T080000Z DTEND;VALUE=DATE-TIME:20120306T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-173346@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=173346 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=173346 END:VEVENT BEGIN:VEVENT SUMMARY:Pixel detectors and ASIC's for synchrotron light experiments and e xperience using the UMC IC technology DTSTART;VALUE=DATE-TIME:20120327T070000Z DTEND;VALUE=DATE-TIME:20120327T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-174705@cern.ch DESCRIPTION:At Paul Scherrer Institut (PSI) several groups carry on projec ts involving chip design.\nThe talk will first briefly present these activ ities\, and then focus on the work done by the SLS-Detector group. The dif ferent detectors developed by the group will be presented\, and a more in depth description of EIGER will be given.\nEIGER is the next generation si ngle photon counting x-ray detector for synchrotron based applications. It is a hybrid silicon pixel detector that features a 75x75 um2 pixel size\, a high maximum frame rate capability of ~22 kHz (independent on the detec tor size)\, double buffered storage for continuous readout and a negligibl e dead time between frames of ~3 us. An EIGER module is constructed from a ~4x8 cm2 monolithic sensor bump-bonded to 4x2 readout chips\, thus result ing in a 0.5 Mpixel detector. Several modules can be tiled together to for m large area detectors and a 16 Mpixel system is already planned. \nFinall y\, some technological issues will be addressed. Performance\, cost and “ease of use” of different technologies will be compared\, with more f ocus on UMC technologies\, and in particular on UMC 0.25um which was the n ode chosen at PSI for the development of several advanced designs\, includ ing EIGER.\n\nhttp://indico.cern.ch/conferenceDisplay.py?confId=174705 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=174705 END:VEVENT BEGIN:VEVENT SUMMARY:Low mass hybrid technology from HIGHTEC (switzerland) DTSTART;VALUE=DATE-TIME:20120402T080000Z DTEND;VALUE=DATE-TIME:20120402T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-183289@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=183289 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=183289 END:VEVENT BEGIN:VEVENT SUMMARY:ATLAS first level trigger electronics and upgrades DTSTART;VALUE=DATE-TIME:20120424T070000Z DTEND;VALUE=DATE-TIME:20120424T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-173347@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=173347 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=173347 END:VEVENT BEGIN:VEVENT SUMMARY:On-chip DC-DC switched mode converters DTSTART;VALUE=DATE-TIME:20120425T070000Z DTEND;VALUE=DATE-TIME:20120425T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-184561@cern.ch DESCRIPTION:This training seminar is supported by ACEOLE\, a Marie Curie A ction at CERN funded by the European Commission under the 7th Framework Pr ogramme. Following the seminar\, scheduled to last about 1 hour\, Dr. Wens will be available for a question/answer session and for discussion in roo m 13-5-022 (starting 10:30-11am depending on the end time of the seminar). \n\nAbstract:\nThe ongoing scaling of CMOS technology keeps on leading to ever more\ncomplex Systems-on-Chip. The degree of on-chip integration play s a key role\nin this evolution as it has a dominant impact on the overall system\nscalability. As such\, efficient on-chip power DC-DC switched-mod e supplies\nare an enabling technology: Not only by bridging the voltage g ap\, but also\nby decreasing the system size\, cost and power consumption. \n\nBio of the speaker:\nMike Wens received the Master of Engineering degr ee in electronic design\ntechniques from the Karel de Grote Hogeschool\, A ntwerp\, Belgium\, in 2004. In\n2006 he received the Master of Science deg ree in microelectronics from the\nKatholieke Universiteit Leuven\, Leuven\ , Belgium. From 2006 on\, he worked as\na research assistant at the ESAT-M ICAS (MICroelectronics And Sensors)\nlaboratories (K.U.Leuven) towards his PhD degree entitled "Monolithic\nInductive CMOS DC-DC Converters"\, which he achieved in 2010. In 2011 he\nco-founded MinDCet\, a mixed-signal IC a nd discrete design house with a focus\ntowards Custom Integrated Power Man agement Solutions. His extensive\nknowledge in the field of switched mode power supplies\, both discrete and\n(fully-)integrated dates back to 2002. His other competences are analog and\nmixed-signal chip design\, high-vol tage applications\, discrete design and\ntube amplifiers.\n\nhttp://indico .cern.ch/conferenceDisplay.py?confId=184561 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=184561 END:VEVENT BEGIN:VEVENT SUMMARY:Pixel readout architectures at the pixel ASIC level DTSTART;VALUE=DATE-TIME:20120508T070000Z DTEND;VALUE=DATE-TIME:20120508T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-173056@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=173056 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=173056 END:VEVENT BEGIN:VEVENT SUMMARY:GEM Detector Electronics & The "GEMs for CMS" upgrade project DTSTART;VALUE=DATE-TIME:20120515T070000Z DTEND;VALUE=DATE-TIME:20120515T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-173057@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=173057 LOCATION:CERN Salle Curie URL:http://indico.cern.ch/conferenceDisplay.py?confId=173057 END:VEVENT BEGIN:VEVENT SUMMARY:Energy Limits in Current A/D Converter Architectures DTSTART;VALUE=DATE-TIME:20120525T070000Z DTEND;VALUE=DATE-TIME:20120525T083000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-191624@cern.ch DESCRIPTION:Driven by ever-increasing application demands\, the energy exp ended per A/D conversion has been reduced substantially over the last deca de. This talk will survey the most recent trends and will investigate ener gy limits as they apply to A/D converter architectures commonly employed i n fine-line CMOS technology (Flash\, Pipeline\, SAR and Oversampling Conve rters). Through this analysis\, opportunities for further improvements wil l be identified and discussed in detail.\n\nhttp://indico.cern.ch/conferen ceDisplay.py?confId=191624 LOCATION:CERN Salle Dirac URL:http://indico.cern.ch/conferenceDisplay.py?confId=191624 END:VEVENT BEGIN:VEVENT SUMMARY:Designing HEP circuits in 65nm DTSTART;VALUE=DATE-TIME:20120605T070000Z DTEND;VALUE=DATE-TIME:20120605T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-173640@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=173640 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=173640 END:VEVENT BEGIN:VEVENT SUMMARY:Equivalent Oxide Thickness Scaling for short channel high-κ/Metal Gate MOSFET: effects on the performance DTSTART;VALUE=DATE-TIME:20120607T070000Z DTEND;VALUE=DATE-TIME:20120607T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-183029@cern.ch DESCRIPTION:The CMOS technology\, basis of modern microelectronics\, has l iterally changed our style of life for the last four decades. The great ad vantage of this technology is the scaling. The MOSFET performance is mainl y controlled by the inversion charge capacitance and therefore by the\ndie lectric thickness scaling. However\, the reduction of the dielectric thick ness (SiO2) in the subnanometric range produces dramatic gate leakage issu es detrimental for the performance. The introduction of high-κ materials (or high-dielectric permittivity material) enables to keep\nincreasing the inversion charge density without reducing the physical dielectric thickne ss. By convenience\, the physical thickness has been replaced by an electr ical thickness or Equivalent Oxide Thickness (EOT). It has been demonstrat ed that the EOT scaling improves the devices\nperformance through the inve rsion charge density increase with a reasonable level of gate leakage. Up to day\, the EOT reaches the 0.6-0.8nm range. This is possible thanks to s pecific high-κ materials (HfO2) and specific techniques based on the scav enging effect. In this\npresentation\, we will briefly review the state-of -art for high-κ/Metal gate devices and explain how to obtain high-κ devi ces. We will also discuss the real advantages of getting ultra thin EOT fo r short channel devices in terms of performance and optimization. In addit ion\, we will open the discussion to possible advantage in term of radiati on hardness for such high-κ devices. This work was partly carried out at the Interuniversity Microelectronics Center (IMEC in Belgium) and the Univ ersidad San Francisco de Quito (USFQ). The USFQ is the only university in Ecuador which counts with modern lab and group of researchers working on t he microelectronics. Our field of expertise goes from the semiconductor de vice to the system level and design of analog/digital electronics systems but includes also the theoretical description of electronic properties of materials by means of DFT methods. As the LHC is planning to increase the luminosity substantially for 2017\, major upgrades in the electronics of t he different detectors\nare needed. USFQ has the potential to contribute a nd is currently exploring the possibility to work jointly with the CMS col laboration and with our CERN colleagues.\n\nhttp://indico.cern.ch/conferen ceDisplay.py?confId=183029 LOCATION:CERN 160-1-009 URL:http://indico.cern.ch/conferenceDisplay.py?confId=183029 END:VEVENT BEGIN:VEVENT SUMMARY:Plans for the Electronics Systems for the ATLAS Upgraded Si Strip Tracker DTSTART;VALUE=DATE-TIME:20121121T130000Z DTEND;VALUE=DATE-TIME:20121121T140000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-211861@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=211861 LOCATION:CERN Salle Anderson URL:http://indico.cern.ch/conferenceDisplay.py?confId=211861 END:VEVENT BEGIN:VEVENT SUMMARY:Upgrade plans for the ATLAS liquid argon calorimeter and its elect ronics DTSTART;VALUE=DATE-TIME:20121122T080000Z DTEND;VALUE=DATE-TIME:20121122T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-211342@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=211342 LOCATION:CERN Salle Anderson URL:http://indico.cern.ch/conferenceDisplay.py?confId=211342 END:VEVENT BEGIN:VEVENT SUMMARY:Many-Core Systems Research at University of Turku\, Finland DTSTART;VALUE=DATE-TIME:20121204T080000Z DTEND;VALUE=DATE-TIME:20121204T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-208581@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=208581 LOCATION:CERN 32-1-A24 URL:http://indico.cern.ch/conferenceDisplay.py?confId=208581 END:VEVENT BEGIN:VEVENT SUMMARY:Analog front-ends for silicon detectors DTSTART;VALUE=DATE-TIME:20121211T080000Z DTEND;VALUE=DATE-TIME:20121211T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-202429@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=202429 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=202429 END:VEVENT BEGIN:VEVENT SUMMARY:TTC system and jitter in LHC experiments DTSTART;VALUE=DATE-TIME:20121218T080000Z DTEND;VALUE=DATE-TIME:20121218T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-202454@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=202454 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=202454 END:VEVENT BEGIN:VEVENT SUMMARY:3D activities at CEA-LETI DTSTART;VALUE=DATE-TIME:20130124T100000Z DTEND;VALUE=DATE-TIME:20130124T110000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225511@cern.ch DESCRIPTION:This presentation will be divided in three main parts. In the first part\, a global introduction will be given on the 3D integration int erest and main advantages. In the second part\, we will describe the main results obtained in the Medipix3 collaboration between CERN and LETI. The 3D technology and the electrical tests will be discussed and the results o f the preliminary tests on the ROIC obtained at CERN will be also presente d. In the last part of the presentation we will focused on 3D available te chnologies at LETI\, ready for short term projects\, and also on the mid a nd long term technologies\, currently in development\, and possibly useful for long term projects.\nContibuting authors : A. Berthelot / R. Cuchet / G. Simon / Y. Lamy / P. Leduc / J. Charbonnier\n\nhttp://indico.cern.ch/c onferenceDisplay.py?confId=225511 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225511 END:VEVENT BEGIN:VEVENT SUMMARY:Open Hardware Development DTSTART;VALUE=DATE-TIME:20130219T080000Z DTEND;VALUE=DATE-TIME:20130219T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225514@cern.ch DESCRIPTION:The accelerator control systems at CERN will be renovated and many electronics modules like analog and digital I/O\, level converters an d repeaters\, serial links and timing modules are being redesigned. The ne w developments are based on VITA and PCI-SIG standards such as FMC\, PCI E xpress and VME64x. The Wishbone specification is used as SoC bus. To attra ct partners\, the projects are developed in an ‘Open’ fashion. Within this Open Hardware project new ways of working with industry are being tes ted and it will be shown that industry can be involved at all stages\, fro m design to production and support.\n\nhttp://indico.cern.ch/conferenceDis play.py?confId=225514 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225514 END:VEVENT BEGIN:VEVENT SUMMARY:GLIB: Gigabit Link Interface Board\, a flexible optical link inter face module for the rad hard GBT link DTSTART;VALUE=DATE-TIME:20130312T080000Z DTEND;VALUE=DATE-TIME:20130312T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225542@cern.ch DESCRIPTION:The Gigabit Link Interface Board (GLIB) project is an FPGA-bas ed platform for users of high-speed optical links in high energy physics e xperiments. The GLIB is a highly flexible module enabling the HEP communit y to get started using the radiation hard GBT optical link\, currently und er development for the LHC upgrades. The major hardware component of the p latform is the GLIB Advanced Mezzanine Card (AMC). Additionally to the AM C\, auxiliary components are developed that enhance GLIB platform’s I/O bandwidth and compatibility with legacy and future triggering and/or data acquisition interfaces\n\nhttp://indico.cern.ch/conferenceDisplay.py?confI d=225542 LOCATION:CERN 32-1-A24 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225542 END:VEVENT BEGIN:VEVENT SUMMARY:ESA strategies for radiation hardened ASICs for space DTSTART;VALUE=DATE-TIME:20130319T100000Z DTEND;VALUE=DATE-TIME:20130319T110000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-237564@cern.ch DESCRIPTION:Overview of ESA teams and programmes involved in the developme nt of ASIC and FPGA for space applications\, the special requirements that space ICs have to meet\, main technologies in use and two important devel opments:\nDeep sub-micron space ASIC offer with radiation hardened librari es based on STMicroelectronics CMOS 65nm\, and DARE radiation hardened l ibraries based on UMC CMOS 180nm\, including mixed-signal capability.\n\nh ttp://indico.cern.ch/conferenceDisplay.py?confId=237564 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=237564 END:VEVENT BEGIN:VEVENT SUMMARY:Time to Digital Converters and results from a new 5ps TDC prototyp e ASIC DTSTART;VALUE=DATE-TIME:20130326T080000Z DTEND;VALUE=DATE-TIME:20130326T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225547@cern.ch DESCRIPTION:Novel sensor designs achieve time resolutions in the sub 10 ps -rms domain. To extract the full potential of such new sensors\, fine-time resolution measurements in the ps regime have become necessary. This semi nar presents common techniques to achieve fine time resolutions and discus ses challenges in the design of fine resolution time-to-digital (TDC) conv erters. In the ps precision domain\, device mismatches and robustness agai nst power supply noise play a crucial important role. Measurement results of a demonstrator ASIC with a small number of channels designed in a 130 n m technology will be presented. Timing precisions better than 3 ps-rms hav e been demonstrated in the lab. The TDC architecture has been designed to target the needs of future high-energy-physics experiments and provide the possibility to be scaled to a larger system.\n\nhttp://indico.cern.ch/con ferenceDisplay.py?confId=225547 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225547 END:VEVENT BEGIN:VEVENT SUMMARY:Interconnect and cooling technology DTSTART;VALUE=DATE-TIME:20130328T080000Z DTEND;VALUE=DATE-TIME:20130328T090000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225544@cern.ch DESCRIPTION:The CERN PCB workshop have been involved many times in the pro duction of low mass devices for inner tracker application. Mainly flex bus es have been produced up to now. Recently we have started 2 studies in thi s field to cope with challenging future requirements: Embedded active sili con devices in flex (bump and bonding free) and Low mass cooling micro cha nnels flexes. Prototype production and preliminary test results will be pr esented.\n\nhttp://indico.cern.ch/conferenceDisplay.py?confId=225544 LOCATION:CERN 32-1-A24 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225544 END:VEVENT BEGIN:VEVENT SUMMARY:Trigger-less front-end architecture for the LHCb upgrade DTSTART;VALUE=DATE-TIME:20130408T070000Z DTEND;VALUE=DATE-TIME:20130408T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225549@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=225549 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225549 END:VEVENT BEGIN:VEVENT SUMMARY:Design For Manufacturing in industry (BB electronics) DTSTART;VALUE=DATE-TIME:20130411T070000Z DTEND;VALUE=DATE-TIME:20130411T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-241971@cern.ch DESCRIPTION:Design For Manufacturing (DFM)\nGeneral approach & Tools: Soft ware\, Templates\, Standards\, Reports\, BOM Analysis\n \nTechnical semina r on how an industrial manufacturing company (BB Electronics) manages the challenge of manufacturing a large mix of different electronics modules in both low and high volume and what tools\, standards and reports are used to assure quality and finalize DFM reports.\n\nDedicated talks with repres entatives from BB electronics can be done in the following coffee break (1 0:00 - 10:45) or on request in the afternoon 14:00 - 16:00 in 14-4-10.\n\n http://indico.cern.ch/conferenceDisplay.py?confId=241971 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=241971 END:VEVENT BEGIN:VEVENT SUMMARY:Multichannel ADCs for physics applications DTSTART;VALUE=DATE-TIME:20130426T070000Z DTEND;VALUE=DATE-TIME:20130426T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225551@cern.ch DESCRIPTION:http://indico.cern.ch/conferenceDisplay.py?confId=225551 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225551 END:VEVENT BEGIN:VEVENT SUMMARY:White Rabbit status and plans DTSTART;VALUE=DATE-TIME:20130514T070000Z DTEND;VALUE=DATE-TIME:20130514T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225554@cern.ch DESCRIPTION:White Rabbit (WR) [1] is a multi-laboratory\, multi-company co llaboration to design the next generation of data transmission and synchro nization system for CERN accelerators and other facilities. WR is fully ma de of Open Source Hardware and Software. After a quick introduction to the technology and the project\, we will go through the services offered by B E-CO-HT to WR users as well as recent developments on data transmission ro bustness\, standardization under IEEE 1588 and RF distribution using WR\, such as needed for e.g. distributing the LHC bunch crossing frequency in a delay-compensated way. There will be a demo session at the end.\n\n[1] ht tp://www.ohwr.org/projects/white-rabbit/wiki\n\nThe seminar will be follow ed by a ~20min demo for those interested.\n\nhttp://indico.cern.ch/confere nceDisplay.py?confId=225554 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225554 END:VEVENT BEGIN:VEVENT SUMMARY:Integrated DC/DC converter design for radiation environments DTSTART;VALUE=DATE-TIME:20130521T070000Z DTEND;VALUE=DATE-TIME:20130521T080000Z DTSTAMP;VALUE=DATE-TIME:20130526T011827Z UID:indico-event-225552@cern.ch DESCRIPTION:In view of LHC experiment upgrades we are developing a custom ASIC DC/DC converter for a new and more optimised detector power distribut ion scheme. The converter has been designed to be radiation tolerant and resistant to the experiment's high magnetic field.\nIn this seminar some i mportant design steps will be presented: the research of a suitable commer cial technology\, design with high and low voltage transistors\, efficienc y optimisation and air core inductor development.\nSince the design pathwa y is not always straightforward\, some parasitic dangers we have discovere d will be shown.\n\nhttp://indico.cern.ch/conferenceDisplay.py?confId=2255 52 LOCATION:CERN 13-2-005 URL:http://indico.cern.ch/conferenceDisplay.py?confId=225552 END:VEVENT END:VCALENDAR