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<ID>154525</ID>
<category>Conferences</category>
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<announcer>
 <user>
  <title></title>
  <name first="Fabrizio" middle="" last="Palla"></name>
  <organization>Sezione di Pisa (IT)</organization>
  <email>fabrizio.palla@cern.ch</email>
  <userid>15116</userid>
 </user>
</announcer>
<title>WIT2012 Workshop on Intelligent Trackers</title>
<description>With the increasing capabilities of microelectronic technology, future particle detectors will be able to yield high level features that are not only simple geometrical positions or energy measurements in the sensors used. The ability to compute such high level primitives in near real-time is what we characterize as &amp;ldquo;intelligence&amp;rdquo;.&lt;br /&gt;
This will enable the construction of detectors with novel functionalities, allowing the trigger logic or even the off-line analysis in experiments to handle immediately more complex features of the measurements. Two examples of new primitives are near real-time charged particle direction or charge clusters without pixel boundary effects. But the addition of such intelligence has practical challenges and in particular system issues must be addressed, such as material budget and power density.&lt;br /&gt;
This Workshop would provide a discussion forum for the community of scientists and engineers working on development of intelligent devices.&lt;br /&gt;
The objectives of the workshop will be to enhance the cross breeding of ideas, to compare concepts for incorporating intelligence in particle trackers, and to explore possibilities for application to other areas.&lt;br /&gt;
The format of the workshop is on plenary sessions, for a duration of 2.5 days.&lt;br /&gt;
This Workshop is the second of the series. The &lt;a href="https://indico.cern.ch/conferenceDisplay.py?confId=68677" target="_blank"&gt; first one &lt;/a&gt;was held in Berkeley in 2010.
&lt;br /&gt;
Registration for the workshop will be &lt;b&gt;by invitation&lt;/b&gt; following review of abstracts.
&lt;br /&gt;
The abstract submission deadline is &lt;b&gt;January 14, 2012&lt;/b&gt;.
&lt;br /&gt;
Proceedings of the workshop will be published in &lt;b&gt;JINST&lt;/b&gt;.
&lt;br /&gt;
Deadline extended to January 28, 2012.
&lt;br /&gt;
We invite submission of abstracts in the following subjects:&lt;br /&gt;
*Applications of intelligent detectors&lt;br /&gt;
*Coupled layer and monolithic architectures&lt;br /&gt;
*Development of specific components&lt;br /&gt;
*Electronic circuits (3D and conventional) on- and off-detector&lt;br /&gt;
*High speed communication&lt;br /&gt;
*System integration&lt;br /&gt;
*Real time pattern recognition&lt;br /&gt;
*Advanced Algorithms </description>
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<closed>False</closed>
<location>
 <name>INFN Pisa</name>
 <address>Largo Bruno Pontecorvo 3
56127 Pisa
Italy</address>
 <room></room>
</location>
<startDate>2012-05-03T08:00:00</startDate>
<endDate>2012-05-05T18:00:00</endDate>
<creationDate>2011-09-08T14:54:03</creationDate>
<modificationDate>2012-07-19T06:36:21</modificationDate>
<timezone>Europe/Paris</timezone>
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 <ID>18</ID>
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 <track>Development of critical technologies and system integration</track>
 <title>MCM-D Technology for Silicon Strip Frontend Hybrids</title>
 <speakers>
  <user>
   <title></title>
   <name first="Lars" middle="" last="Eklund"></name>
   <organization>University of Glasgow (GB)</organization>
   <email>lars.eklund@cern.ch</email>
  </user>
 </speakers>
 <primaryAuthors>
  <user>
   <title></title>
   <name first="Lars" middle="" last="Eklund"></name>
   <organization>University of Glasgow (GB)</organization>
   <email>lars.eklund@cern.ch</email>
  </user>
 </primaryAuthors>
 <coAuthors>
  <user>
   <title></title>
   <name first="Alexandre" middle="" last="Chilingarov"></name>
   <organization>Lancaster University (GB)</organization>
   <email>a.chilingarov@lancaster.ac.uk</email>
  </user>
  <user>
   <title>Dr.</title>
   <name first="Tony" middle="" last="Affolder"></name>
   <organization>University of Liverpool (GB)</organization>
   <email>affolder@hep.ph.liv.ac.uk</email>
  </user>
  <user>
   <title></title>
   <name first="Gianluigi" middle="" last="Casse"></name>
   <organization>University of Liverpool (GB)</organization>
   <email>gianluigi.casse@cern.ch</email>
  </user>
  <user>
   <title></title>
   <name first="Ashley" middle="" last="Greenall"></name>
   <organization>University of Liverpool (GB)</organization>
   <email>ashley@hep.ph.liv.ac.uk</email>
  </user>
  <user>
   <title></title>
   <name first="John" middle="" last="Matheson"></name>
   <organization>STFC - Science &amp; Technology Facilities Council (GB)</organization>
   <email>j.matheson@rl.ac.uk</email>
  </user>
  <user>
   <title></title>
   <name first="Daniel" middle="" last="Hynds"></name>
   <organization>University of Glasgow (GB)</organization>
   <email>daniel.hynds@cern.ch</email>
  </user>
 </coAuthors>
 <location>
  <name>INFN Pisa</name>
  <address>Largo Bruno Pontecorvo 3
56127 Pisa
Italy</address>
  <room></room>
 </location>
 <startDate>2012-05-04T09:30:00</startDate>
 <endDate>2012-05-04T10:00:00</endDate>
 <duration>00:30</duration>
 <abstract>Multi-chip Modules - Deposited (MCM-D) technology can be applied to
silicon strip modules and promises advantages in terms of integration
complexity and material budget. The principle is to deposit
alternating dielectric and metal layers directly on the silicon
sensor, building up a PCB like structure. With lithographic techniques
traces and vias are etched with high resolution creating a circuit
replacing the pitch adaptor, wire bonds and electronics hybrid. 

This paper reports on a feasibility study performed in the context of
the Atlas Upgrade. The technology was evaluated in two prototype
processing runs. The first prototypes had a single dielectric and
metal layer deposited on a silicon strip sensor, with the purpose of
evaluating the change in performance due to the post-processing and
the presence of a ground plane. Sensor parameters were measured before
and after irradiation up to 10^16 n_eq/cm^2 and charge collection
efficiency was measured for several doses. A non-irradiated sensor was
measured in a beam test yielding signal height and resolution for
regions with and without ground plane. The second prototype was a fully
functional 20-chip front-end hybrid with five metal layers build on a
blank silicon sensor. The hybrid has the same performance as an
identical circuit built in kapton technology.</abstract>
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