154525 Conferences false [["minutes", "Minutes"], ["notes", "Notes"], ["paper", "Paper"], ["poster", "Poster"], ["slides", "Slides"], ["summary", "Summary"]] Sezione di Pisa (IT) fabrizio.palla@cern.ch 15116 WIT2012 Workshop on Intelligent Trackers With the increasing capabilities of microelectronic technology, future particle detectors will be able to yield high level features that are not only simple geometrical positions or energy measurements in the sensors used. The ability to compute such high level primitives in near real-time is what we characterize as “intelligence”. This will enable the construction of detectors with novel functionalities, allowing the trigger logic or even the off-line analysis in experiments to handle immediately more complex features of the measurements. Two examples of new primitives are near real-time charged particle direction or charge clusters without pixel boundary effects. But the addition of such intelligence has practical challenges and in particular system issues must be addressed, such as material budget and power density. This Workshop would provide a discussion forum for the community of scientists and engineers working on development of intelligent devices. The objectives of the workshop will be to enhance the cross breeding of ideas, to compare concepts for incorporating intelligence in particle trackers, and to explore possibilities for application to other areas. The format of the workshop is on plenary sessions, for a duration of 2.5 days. This Workshop is the second of the series. The <a href="https://indico.cern.ch/conferenceDisplay.py?confId=68677" target="_blank"> first one </a>was held in Berkeley in 2010. Registration for the workshop will be by invitation following review of abstracts. The abstract submission deadline is January 14, 2012. Proceedings of the workshop will be published in JINST. Deadline extended to January 28, 2012. We invite submission of abstracts in the following subjects: *Applications of intelligent detectors *Coupled layer and monolithic architectures *Development of specific components *Electronic circuits (3D and conventional) on- and off-detector *High speed communication *System integration *Real time pattern recognition *Advanced Algorithms False INFN Pisa

Largo Bruno Pontecorvo 3 56127 Pisa Italy

2012-05-03T08:00:00 2012-05-05T18:00:00 2011-09-08T14:54:03 2012-07-19T06:36:21 Europe/Paris 39 false [["minutes", "Minutes"], ["notes", "Notes"], ["paper", "Paper"], ["poster", "Poster"], ["slides", "Slides"], ["summary", "Summary"]] Development of high performance tracking layers as a sandwich of optimised CMOS pixel sensors Institut Pluridisciplinaire Hubert Curien (FR) baudot@in2p3.fr Institut Pluridisciplinaire Hubert Curien (FR) baudot@in2p3.fr Dr. Deutsches Elektronen-Synchrotron (DE) ingrid.gregor@desy.de Dr. University of Bristol (GB) joel.goldstein@cern.ch Institut Pluridisciplinaire Hubert Curien (FR) marc.winter@cern.ch Institut Pluridisciplinaire Hubert Curien (FR) auguste.guillaume.besson@cern.ch University of Oxford r.gauld1@physics.ox.ac.uk Dr. Institut Pluridisciplinaire Hubert Curien (FR) serhiy.senyukov@cern.ch Dr. University of Oxford (GB) a.nomerotski1@physics.ox.ac.uk INFN Pisa

Largo Bruno Pontecorvo 3 56127 Pisa Italy

2012-05-03T20:00:00 2012-05-03T21:00:00 01:00 We propose to enhance the performances of tracking layers by building a sandwich of low power time-integrating CMOS pixel sensors. Sensors equipping one side of the layer offer a high spatial resolution (few μm), while the sensors on the other side focus on the time resolution (few μs). The whole device targets a material budget lower than 0.5 % of X0. We will present the in-beam test results of a double-sided ladder featuring 8 millions of pixels (18.4 × 18.4 μm2) read-out in 110 μs and an equivalent thickness of 0.6 % of X0, build by the PLUME collaboration. Plans to reach 0.3 % of X0 will also be discussed. We will then review the development of CMOS pixel sensors with various optimisations with respect to the spatial or time resolution. Especially the road to reach a few microseconds read-out time, while maintaining the power budget at the few μW per pixel level will be described. The conclusion will show possible implementation of these double-sided tracking layers. paper Paper doc http://indico.cern.ch/images/word.png word file ppt http://indico.cern.ch/images/powerpoint.png powerpoint file pdf http://indico.cern.ch/images/pdf_small.png pdf file odt http://indico.cern.ch/images/writer.png writer file odp http://indico.cern.ch/images/impress.png presentation file ods http://indico.cern.ch/images/calc.png spreadsheet file other http://indico.cern.ch/images/file_small.png unknown type file link http://indico.cern.ch/images/link.png link 2013-05-24 2013-05-25