8-13 March 2006
Indian Institute of Science
Europe/Zurich timezone
- lcws06@tifr.res.in
Support
Developments for a digital TPC : the SiTPC project
Presented by Paul COLAS
on
13 Mar 2006
from
11:25
to
11:50
content
Results and simulations of a TPC with an endplate with a Micromegas or a GEM
amplification followed by a readout by a VLSI CMOS chip Medipix2 will be presented.
The steps in progress towards the realisation of a sizeable prototype, within the
EUDET program, will be presented: improvement of the protection against breakdown,
integration of the Micromegas grid onto the wafer (InGrid), and design of the Timepix
chip provided with a timing and/or time-over-threshold capability.
Place
Location: Indian Institute of Science
Address: C. V. Raman Road,
Bangalore 560012,
India
Room: SSCU
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