8-14 June 2011
Chicago
US/Central timezone
Recent progress of the pixel detectors R&D based on the SOI technology
Presented by Dr. Toshinobu MIYOSHI
on
13 Jun 2011
from
14:20
to
14:40
Content
We are developing monolithic pixel detectors with a 0.2 um silicon-on-insulator (SOI) CMOS technology. The substrate layer is high-resistivity silicon, and works as a radiation sensor having p-n junctions. The SOI layer is 40 nm silicon, where readout electronics is implemented. There is a buried oxide layer between these silicon layers. This structure is ideal for a monolithic pixel detector. The SOI pixel detectors are useful in various research fields, such as high-energy physics, X-ray material analysis, astrophysics and medical sciences. Czochralski (CZ) silicon is used as a starting material for the detector fabrication. In such a case, the registivity of the substrate after the fabrication is about 700 ohm-cm. We have recently introduced Float Zone (FZ-) SOI wafers for the fabrication. As a result, the resistivity increased and therefore the detectors worked at near full depletion below the breakdown voltage. In this talk, we will report an overview of the detector design and features, and measurements of performance with red laser, X-ray and charged partcles. We will also compare FZ- with CZ- SOI pixel detectors for the performance. This work was realized within the SOIPIX collaboration.
Place
Location: Sheraton Hotel
Room: Chicago Ballroom 10
Co-authors
- Prof. Yasuo ARAI KEK
- Mr. Youichi FUJITA KEK
- Dr. Kazuhiko HARA Univ. of Tsukuba
- Dr. Ryo ICHIMIYA KEK
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