Conveners
A5a: ASICS
- Marcus Julian French (STFC - Science & Technology Facilities Council (GB))
Ms
Sylvie BLIN
(Laboratoire de l'Accélérateur Linéaire)
20/09/2012, 09:50
Oral
The SPACIROC ASIC family is designed for the JEM-EUSO observatory onboard of the International Space Station (ISS). This rad-hard ASIC is proposed for reading out the 64-channel Multi-Anode Photomultipliers which will equip the detection surface. Two main features of this ASIC are the photon counting mode for each input and the charge-to-time conversion for the multiplexed channels....
Dr
Esko Mikkola
(Ridgetop Group, Inc.)
20/09/2012, 10:15
Oral
Radiation hardened analog to digital converter (ADC) has been designed for future high energy physics experiments. The ADC has been designed in a commercial 130nm CMOS process and it achieves 12-bit resolution,40 MS/s sampling speed, 15 mW power consumption and hardness to at least 1 Megarad(Si) of total ionizing dose (TID). 16 ADC channels will be placed on one packaged silicon chip. The ADC...