Speaker
Andre Georg Holzner
(Univ. of California San Diego (US))
Description
The Data Acquisition system of the Compact Muon Solenoid experiment at CERN assembles events at a rate of 100 kHz, transporting event data at an aggregate throughput of 100 GB/s. By the time the LHC restarts after the 2013/14 shut-down, the current compute nodes, networking, and storage infrastructure infrastructure will have reached the end of their lifetime. In order to handle higher LHC luminosities / or event pile-up, a number of sub-detectors will be upgraded, increase the number of read-out channels and replace the off-detector read-out electronics with an implementation in the microTCA architecture. The second generation DAQ system, foreseen for 2014, will need to accommodate the readout of both existing and new off-detector electronics and provide an increased throughput capacity. Advances in storage technology could make it feasible to write the output of the event builder to (ram or SSD) disks and implement the HLT processing entirely file based. We are presenting the design of the 2nd generation DAQ system, including studies of the event builder based on advanced networking technologies such as 10 and 40 Gb/s Ethernet and 56 Gb/s FDR Infiniband and exploitation of multi-core CPU architecture.
Primary author
Frans Meijers
(CERN)
Co-author
Andre Georg Holzner
(Univ. of California San Diego (US))
