3–10 Aug 2016
Chicago IL USA
US/Central timezone
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The LHCb VELO Upgrade (12' + 3')

4 Aug 2016, 17:30
15m
Chicago 8

Chicago 8

Oral Presentation Detector: R&D and Performance Detector: R&D and Performance

Speaker

Stefano De Capua (University of Manchester (GB))

Description

The upgrade of the LHCb experiment, scheduled for LHC Run-3, will transform the experiment to a triggerless system reading out the full detector at 40 MHz event rate. All data reduction algorithms will be executed in a high-level software farm. enabling the detector to run at luminosities of $ \rm{2 \times 10^{33}/cm^2/s}$. The Vertex Locator (VELO) is the silicon vertex detector surrounding the interaction region. The current strip detector will be replaced with a hybrid pixel system equipped with electronics capable of reading out at 40 MHz. The upgraded VELO will provide fast pattern recognition and track reconstruction to the software trigger. The silicon pixel sensors have 55×55 μm2 pitch, and are read out by the VeloPix ASIC, from the Timepix/Medipix family. The VeloPix builds on the currently available Timepix3, modified to deliver a radiation hard design capable of an order of magnitude increase in output rate. The hottest regions will have pixel hit rates of 900 Mhits/s yielding a total data rate more than 3 Tbit/s for the upgraded VELO. The silicon pixel sensors must be radiation hard to a level of $\rm{8 \times 10^{15} 1 MeV~n_{eq}/cm^2}$, delivered non uniformly over the sensor surface, and the $\rm {R\&D}$ is focussing on designs capable of tolerating high voltage after irradiaton and maintaining good efficiency and resolution. The detector modules are located in a separate vacuum, separated from the beam vacuum by a thin custom made foil. The foil will be manufactured through a novel milling process and possibly thinned further by chemical etching. The material budget will be minimised by the use of evaporative $\rm CO_2$ coolant circulating in microchannels within 400 um thick silicon substrates. This breakthrough technology allows very efficient heat removal for minimal material and excellent CTE match but poses considerable challenges in the design of the circuits and connectors. The current status of the VELO upgrade will be described and latest results from the design and prototyping will be presented.

Co-author

Kazu Carvalho Akiba (Univ. Federal do Rio de Janeiro (BR))

Presentation materials