The Ocean and Octopus designs for the Phase-2 upgrade of the CMS L1 muon trigger

Sep 24, 2021, 12:00 PM
16m
Oral Trigger Trigger

Speaker

Michail Bachtis (University of California Los Angeles (US))

Description

The throughput and processing requirements of the CMS L1 Trigger for HL-LHC require platforms with high-end FPGAs and many high speed optical links. The Ocean platform features the largest ZYNQ Ultrascale+ SoC and 72 transceivers connected to on-board optics reaching rates up to 28 Gbps. The Octopus^2 design targeted for the CMS Muon Trigger at HL-LHC features a Virtex Ultrascale+ 13P FPGA in and 128 bi-directional links connected through copper to QSFP and QSFP-DD optics. Signal integrity results, comparison of different layout strategies and heat management for large FPGAs featuring lidless packages will be discussed.

Summary (500 words)

The CMS Phase-2 L1 Muon Trigger performs combined muon reconstruction in the CMS experiment using both the tracker and the muon system. The system requires a throughput of about 20 Tbps and large FPGA processing logic. The latest Ultrascale+ FPGAs
by Xilinx satisfy the processing and I/O requirements but impose challenges on PCB design, power, and heat management.
The Octopus^2 mezzanine features a VU13P FPGA in the A2577 package and 128 optical transceivers that reach speeds up to 25 Gbps. The board features 16 Samtec Accelerate connectors (8 per side) that connect 128 serial transceivers to optics reaching speeds up to 28 Gbps. The PCB was designed using High Density Interconnect (HDI) techniques achieving a layer count of 14 and a form factor of 15x12.5 cm. In spite of the small size, the board supports core power up to 300 W and features a second smaller assisting Kintex 7 FPGA with DDR3 memory and novel custom build board to board connectivity through flex. The PCB is optimized for conduction cooling and the small size of the mezzanine allows it to be mounted on a large heatsink minimizing mechanical PCB deformations and optimizing heat dissipation. Heat management is optimized further by deploying lidless FPGAs and designing a custom heatsink that provides direct contact to the die. The Samtec accelerate technology enables several types of supported optics. The board connects to an optical module that features cutting edge QSFP-DD optical transceivers that support 200 Gbps I/O bandwidth per cage. The design strategies will be described together with results for heat management and signal integrity with different optics and different trace geometries. Results from operation of the mezzanine on an Advanced TCA board will be shown.
The signal integrity results and operational capabilities of the board will be compared to the previous generation Ocean processor that is the first board in CMS that features one large single System-On-Chip (ZU19EG) and 72 optical transceivers reaching speeds up to 28 Gbps.

Primary authors

Michail Bachtis (University of California Los Angeles (US)) John Jones (University of California Los Angeles (US)) Maxx Tepper (University of California Los Angeles (US))

Presentation materials