The Monolithic Active Pixel Sensor (MAPS) has been widely used in nuclear and particle physics. The real-time particle tracking applications at the Heavy Ion Research Facility in Lanzhou (HIRFL) and the High-Intensity heavy-ion Accelerator Facility (HIAF) require MAPS to measure the position, energy deposition, and arrival time of the particle hits. Thus, a MAPS with such capability is being designed in a 130nm process. As the critical part of this MAPS, a 12-bit column-parallel ADC has been designed to serve the pixels in every two adjacent columns.
This column-parallel ADC is designed in a novel structure to satisfy the restricted constraints on area, power, speed, and accuracy. The sub-ADC using a switched capacitor circuit is designed based on the input offset storage technology, effectively reducing the comparison offset. In addition, the SHA-less architecture reduces one clock cycle compared with the traditional structure. The well-optimized timing for the switches also decreases the charge injection effect and eliminates the influence of charge left from the last conversion, which benefits the resolution.
Each column-parallel ADC covers a small area of 380×100 μm2 and consumes a power of 7.6mW at a 3.3V power supply. At 40MHz internal clock frequency, the ENOB of ADC reaches 11.61bit at the sampling rate of 3.63MHz, with the SNDR of 71.65dB.
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