Aug 1 – 5, 2022
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Design of high-speed data transmission control system based on USB 3.0

Not scheduled
Poster plus Minioral Fast Data Transfer Links and Networks Mini Oral - III


LI, Yukun


In high-precision radionuclide measurements, ADC is usually used to sample the detector signal, and FPGA is used to preprocess the acquired data, then the large amount of acquired data is transmitted to PC for further processing. In the case of high radioactivity, the acquisition system generates a large amount of data. At the same time, it is necessary to control the running state and parameters of the acquisition system through the PC. Therefore, it is essential to realize high-speed real-time communication between the FPGA and the PC. USB 3.0 is widely used because of its high reliability, fast transmission speed, short development cycle and good versatility. This system selects cyusb3014 chip. FX3, a peripheral controller, is used to program the chip. FX3 is configured as slave FIFO to realize data buffering, high-speed bulk transmission, short packet transmission and other functions. FX3 communicates with the FPGA through a programmable GPIF II interface. The host computer obtains USB data by calling the Cyusb.dll library. In the case of high-speed transmission, the delay requirements of the host computer are more stringent. Therefore, it is necessary to use an efficient and low-latency multi-thread processing method to save data in time to avoid data overwriting. Based on ring buffer, disruptor is a high-performance multi-threaded processing architecture. This architecture is suitable for high-speed USB transfer. After testing, the FPGA can achieve two-way communication with the PC, and the maximum upload rate can reach 374MB/s.

Minioral Yes
IEEE Member No
Are you a student? Yes

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