Speaker
Description
Precision timing at 10ps levels will be transformative at future collider experiments. In case of high-energy, high-luminosity hadron colliders, including Run5/6 upgrades of HL-LHC, an integrated four-dimensional tracker with timing resolution of 10-30ps can drastically reduce the combinatorial challenge of track reconstruction at very high pileup densities. 4D trackers and timing layers are also expected to play important roles at future muon, electron-positron, and electron-ion colliders. As one of the critical circuit blocks necessary to enable 4D operation in trackers we present the design of 6.25ps resolution Time-to-Digital Converter in 28nm CMOS technology that implements dithering to improve conversion linearity.
Summary (500 words)
As the luminosity of colliders goes up, the number of particle interactions per bunch crossing (pileup) increases and it becomes one of the main challenges along with radiation hardness. A powerful way to mitigate the effects of pileup is to use precision timing to distinguish between collisions occurring close in space but separated in time. Both ATLAS and CMS will incorporate dedicated fast-timing detector layers for the HL-LHC upgrade.
Timing information will be even more important at future high-energy, high-luminosity hadron colliders (100 TeV) and will require full integration of timing with the 3-dimensional spatial information of pixel detectors. An integrated 4-dimensional tracker with track timing resolution at the levels of 10ps can drastically reduce the combinatorial challenge of track reconstruction at extremely high pileup densities. Furthermore, four-dimensional trackers will allow future muon collider detectors to address the difficult beam induced background challenge. In future electron-positron colliders, fast-timing can provide time-of-flight (ToF) capabilities for particle-identification at low momentum and long-lived particles. The Electron-Ion Collider may utilize a 4D tracking detector to provide ToF particle identification capabilities as well as vertex identification for far-forward hadrons.
CERN’s EP-R&D-WP5 survey has promoted the selection of 28nm CMOS node as the next step in microelectronics scaling for HEP designs. This technology exhibits better radiation hardness and higher circuit density compared to the previous node and is a good candidate for design of high granularity 4D trackers. As one of the critical circuit blocks necessary to enable 4D operation in trackers we present the design of high-precision Time-to-Digital Converter (TDC) in 28nm CMOS technology.
The core of the TDC architecture is composed of voltage-controlled delay cells set at 50ps propagation delay and assembled in a 4-cell ring-oscillator with enable/disable function with programmable starting state. The ring-oscillator, enabled with a START trigger, coupled with a counter (2bit or more depending on range requirement) and a series of flip-flops sampling the state of the oscillator (3bit) in correspondence of a STOP trigger performs a START-STOP time-interval quantization with 50ps time-steps and 5+bit range. The feature of having the oscillator starting condition programmable, coupled with pseudo-random selection of the starting point at each measurement cycle, performs the dithering function thus improving the conversion linearity beyond the limits set by mismatches between the delay cells of the ring-oscillator. If 50ps resolution is sufficient, this structure can be used as a standalone medium-resolution, high-linearity TDC.
To reach a sub-ps resolution, the 50ps time-steps of the previous structure is interpolated by a factor of 8 (additional 3bits) using a second ring-oscillator with delay cells set to 56.25ps propagation delay and enabled by the STOP signal. Each step of the first ring-oscillator is sampled in correspondence of both rising and falling edges of the second ring-oscillator by a 2D array of flip-flops. This 2D Vernier structure reaches a resolution equal to the difference of propagation delays of cells in the two oscillators, i.e. 6.25ps. Both ring-oscillators implement the programmable starting state, i.e. dithering, thus improving the linearity of the overall conversion.
