Jun 25 – 29, 2023
Ole-Johan Dahls Hus
Europe/Oslo timezone

An Analog Neural Network ASIC for Image Reconstruction Embedded in Detectors

Jun 28, 2023, 2:40 PM
Simula Auditorium (Ole-Johan Dahls Hus)

Simula Auditorium

Ole-Johan Dahls Hus

Oslo Science Park Gaustadalléen 23B, 0373 Oslo
Oral Frond-end Electronics and Readout Front-end Electronics and Readout


Marco Carminati


Two key emerging trends in sensors and detectors are: (1) the application of machine learning (ML) to data processing and (2) the migration of processing from the back-end towards the front-end. Embedded processing allows to reduce the amount of data transmitted (both in terms of data rate and interconnection lines), with evident advantages also in the field of high-count-rate, densely pixelated radiation detectors, especially for imaging applications, such as emission tomography (PET and SPECT, especially with large fields of view) for both diagnostics and monitoring of particle therapy [1].
Within this context, we present an analog ASIC, implementing in charge domain neural networks (NN) with the multilayer perception architecture. Differently from traditional digital implementations of ML based on embedded devices such as microcontrollers, dedicated accelerators or FPGA, this analog CMOS ASIC is realized in the same microelectronic technology of the analog front-end of radiation detectors and, thus, a full monolithic integration of these blocks is envisioned (Fig. 1). We consider, in particular, the problem of estimating the planar scintillation coordinates (x,y) of a gamma ray in a crystal read by bottom tiles of SiPM. However, any other type of signal processing leveraging NNs, such as the estimation of energy and timing of detected events [2] or the correction of charge sharing, for instance in CZT detectors [3], could be addressed by this ASIC.
As shown in Fig. 2, each neuron consists of a charge integrator summing the charge provided by the previous layer of neurons. The weight is obtained with a programmable capacitance (made of a bank of N switched capacitors) multiplied by the neuron voltage. As activation function, the integrator implements a ReLU. We have selected a NN with 64 input nodes, two inner layers of 20 neurons each and two output neurons for inference of x and y. The 64 input voltages represent the outputs of the front-end: the peak energy sampled for the individual currents of the SiPMs in the Anger camera by a multichannel ASIC such as GAMMA [4]. The ASIC implementing this architecture is under design and its circuit details (and full ASIC Cadence simulations) will be presented at the conference. We expect the first ASIC prototype (fabricated in 0.35 μm node) to fit in an area below 10 mm2 and solve the NN in 4.6 μs (with a clock period of 100 ns) with a power dissipation of 14 mW (1.8 TOPS/W).
At the same time, the NN has been trained on both simulated and experimental data for monolithic gamma-ray detectors based on arrays of 64 SiPMs for both PET and SPECT. Here we report the reconstruction performance of this NN on an experimental dataset collected with a state-of-the-art monolithic PET detector made of a 32 mm  32 mm  22 mm LYSO:Ce scintillator read by 64 SiPMs [5]. The comparison of the proposed NN (both for an ideal and quantized case with N = 5 bits) with respect to a k-nearest neighbour (kNN [5]) is shown in Fig. 3: the spatial resolution, measured with different metrics, is similar, with a potentially relevant advantage in terms of computational effort.

Primary authors

Ms Susanna Di Giacomo (Politecnico di Milano) Mr Michele Ronchi (Politecnico di Milano) Dr Giacomo Borghi (Politecnico di Milano) Marco Carminati Carlo Fiorini (Politecnico di Milano - INFN Milano)

Presentation materials