This work provides an update on the XIDER project, a study aimed at developing a 2D X-ray charge integrating hybrid pixel detector designed to operate with high-Z semiconductor sensors by implementing the incremental digital integration readout. The XIDER front-end chips are designed in 65 nm CMOS technology with a pixel pitch of 100 µm. Each pixel includes a charge integrator and a digitiser capable of sub-microsecond analog-to-digital conversion, as well as logic and built-in digital memory.
The XIDER front-end deals with very high photon fluxes of up to 10^9 photons per second and pixel, operating with either continuous or pulsed X-ray beams with a rate of up to 5.6 MHz, the ESRF pulse repetition frequency in 16-bunch filling mode. The performance of XIDER prototypes has been evaluated with pulsed LED illumination in the laboratory and with both continuous and pulsed X-ray synchrotron beams at ESRF beamlines under different operating conditions.