MathWorks SoC Design Flows @ CERN

• Stephan van Beek (MathWorks)

Room: 222/R-001 This 3-hour workshop, presented by experts from MathWorks, offers a deep dive into the latest applications and best practices of Model-Based Systems Engineering (MBSE) and Model-Based Design (MBD) for System-on-Chip (SoC) design flows. Attendees will gain hands-on experience in floating point to fixed-point conversion, automatic code generation workflows for Field Programmable Gate Arrays (FPGAs) and SoCs, and optimizing code for performance. The workshop is specifically tailored for algorithm, system, and hardware engineers involved in configuring models for Hardware Description Language (HDL) code generation for deployment on FPGA, SoC, or Application-Specific Integrated Circuit (ASIC) platforms.