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Description
A family of fully integrated (including all capacitors and inductors) rad-hard DCDC converters has been developed for the first time in the HEP community. This work presents the experimental results of three functional ASICs prototypes designed in a 28nm CMOS technology using 0.9V-rated transistors. All prototypes have been designed to withstand 1Grad. iPOL5V and iPOL2V3 are state-of-the-art resonant DCDC converters, able to regulate respectively from 5V and 2.3V to 0.8-1V. They respectively feature a peak efficiency of 67% and 80%. Furthermore, a linear regulator (linPOL1V2) able to convert 1.2V down to 0.8-1V has been designed and tested.
Summary (500 words)
The CERN DCDC-converter team has developed a pioneering family of fully integrated rad-hard voltage regulators in the framework of the EP funded WP5.2 R&D program. All capacitors and inductors have been integrated in the DCDC converter ASICs together with the power switches, the gate drivers, and the control circuitry.
This work presents the characterization results of three ASIC prototypes engineered using a 28nm CMOS technology: iPOL5V and iPOL2V3 are state-of-the-art resonant DCDC converters employing a switched tank topology, while linPOL1V2 is a linear regulator. They have been designed to regulate respectively a 5V, 2.3V and 1.2V input down to the 0.8-1V range and they have all shown full functionality.
iPOL5V consists of three stacked power conversion stages, each composed of two pairs of power switches and of an LC resonant tank. The maximum conversion ratio Vout/Vin that can be theoretically achieved is ¼, and lower output voltage values can be obtained by adjusting the on-time of the switches. The switching frequency is fixed and equal to the LC resonant tank frequency and measured at 150MHz. The measured peak efficiency for the 5V to 0.9V conversion is 67% and the maximum output current that can be achieved while maintaining regulation is 460mA.
The developed prototype uses three fully integrated coupled LC resonant tanks designed by the DCDC-converter team. The on-chip integration of the bulky inductors allows a significant material budget reduction for the DCDC converter, as no additional component on the PCB is required. iPOL5V could be used standalone or could be integrated as a macro block in designs (e.g. pixel read-out ASICs) that employ the same 28nm CMOS technology.
The ASIC features also an on-chip bandgap voltage reference and a quadrature phase all digital DLL to generate the different clock phases that are necessary to drive the power switches. The selected topology allows employing only core transistors rated at 0.9V, thus conduction and driving losses are minimized. In addition, these 0.9V-rated transistors have demonstrated high radiation tolerance, promising full operation of the converter up to a Total Ionizing Dose (TID) of 1Grad. X-ray irradiation tests will be performed and the results will be presented at the workshop.
Another significant advantage of the selected converter topology is its modularity, which allows to obtain different conversion ratios by adjusting the number of power stages. iPOL2V3 exemplifies this flexibility with its single power conversion stage, achieving a maximum Vout/Vin conversion ratio of 1/2. It shares the same control circuit of iPOL5V and showcases peak efficiencies of 80% with a maximum load current capability of 250mA for the 2.3V to 0.9V conversion.
The linear regulator linPOL1V2 has been tested up to 500mA of output current and shows a load regulation of 6mV/500mA for a 1.2V to 0.9V regulation. Furthermore, a prototype has been irradiated with X-rays, remaining functional up to 1.2 Grad of TID, showing only a 2mV variation in its output voltage compared to the pre-radiation value.
