Younes:

• Searching for a solution to avoid automatic block design file update everytime a synthesis is ran. Any ideas ? 
  • Enable block design creationg in project TCL script
• Implemented automatic triggering of documentation pulling and website deployment in Boreal CI
• Currently working on publising all bitstream built by the CI into a gitlab release for users 
• Will start actively documenting the new Boreal architecure on the website, with instruction about how to seamlessly integrate new devices