Speaker
Description
Optimized FPGA implementations of tiny neural networks are crucial for low-latency and hardware-efficient inference for a variety of applications. Neural networks based on lookup tables (LUTs) are a standard technique for such problems due to their hardware efficiency and strong expressivity. However, such networks are often difficult to scale up as their resource usage scales exponentially with LUT fan-in. To address this issue, we propose a LUT-based implementation of the recently proposed Kolmogorov-Arnold Network (KAN). KANs consist of spline-based, trainable activations as edges between neurons in adjacent layers, with each node performing a sum operation on incoming activations. Because of the strong expressivity of spline-based activations, KANs can often achieve similar accuracies as compared to multi-layer perceptrons (MLPs) using significantly fewer layers. Since each node-to-node spline computation is performed with a LUT lookup, the fan-in of each LUT is only unity which avoids scaling issues associated with other LUT-based networks. Along with quantization-aware training (QAT), this architecture is well-suited for edge-pruning to decrease hardware resources after sparsification in training. Empirically, we demonstrate on various benchmarks that our design achieves task performance similar to other state-of-the-art techniques while also using comparable or fewer hardware resources.