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    by Dr Oliver Gregor Rietmann (CERN)

    → Europe/Zurich
    593/R-010 - Salle 11 (CERN)

    593/R-010 - Salle 11

    CERN

    50
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    Description

    Abstract

     Memory layout refers to different ways of storing the same data in memory. These memory layouts have an impact on the performance. Which data layout is optimal, depends on the algorithm running on the data and on the hardware the algorithm is running on. This difference in performance arises from the way the computer operates on memory. The goal of this course is thus to understand how memory is handled and how it maps to performant data layouts. Concretely, we will look into caching, memory access patterns, array of structs, structs of array, alignment, vectorization (CPU), and coalescing (GPU). The workshop consists of two parts: a lecture, followed by hands-on exercises.

    Lecturer Bio

    Oliver Rietmann did his Bachelor's and Master's in mathematics and physics at ETH Zurich. He obtained is PhD in applied mathematics from the same university. He worked as a video game developer and as a software developer in cloud computing. For two years, he is a Fellow at the ALICE experiment at CERN.