25–29 Sept 2015
International Conference Center (also named as <a href="http://www.jdnyhotel.com/index.php" target="_blank">“Nanyang Hotel”</a>)
PRC timezone

Development of planar pixel modules for HL-LHC

26 Sept 2015, 19:11
1m
Multi-function Hall (International Conference Center (Nanyang Hotel))

Multi-function Hall

International Conference Center (Nanyang Hotel)

Speaker

Anna Macchiolo (Max-Planck-Institut fuer Physik (Werner-Heisenberg-Institut) (D)

Description

To meet the challenges of tracking at the luminosities delivered by the HL-LHC requires upgrades of tracking systems. To perform pattern recognition and vertexing in events with pile-up of up to 200 requires a larger area pixel system within the tracker. This paper reports on the development of large area planar detectors for the outer pixel layers and pixel endcaps. Large area sensors of area 2x2cm2 have been fabricated and mounted onto 4 FE-I4 readout ASICs, so called quad-modules, and their performance evaluated in the laboratory and testbeam to evaluate noise, threshold and bump-bond yield. The current-voltage characteristics of the sensors have been studied and this has been used to improve the design of the biasing, guard rings. Studies of sensors matched to a single Fe-I4 with AC and DC coupling to the front-end electronics have been made, and their noise and tracking performance compared. Sensors with different geometries have been fabricated and characterised in the laboratory and their tracking performance evaluated. A particular challenge in producing thinned large area modules is the bump-bonding, where low yield can be observed due to bowing of the sensor and readout chip during the bonding process. A new bump-bonding process using backside compensation to address the issue of low yield will be described and results of bump yield presented.

Primary author

Craig Buttar (University of Glasgow (GB))

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