Preliminary Design Review (PDR) for NSW Electronics

Europe/Zurich
various rooms (CERN)

various rooms

CERN

Lorne Levinson (Weizmann Institute of Science (IL)) , Philippe Farthouat (CERN) , Stephanie Ulrike Zimmermann (Albert-Ludwigs-Universitaet Freiburg (DE))
    • 9:00 AM 7:00 PM
      Monday 9 February: On-detector Electronics 40/S2-C01 - Salle Curie

      40/S2-C01 - Salle Curie

      CERN

      30
      Show room on map
      • 9:00 AM
        Review Procedure 10m
        Speaker: Philippe Farthouat (CERN)
      • 9:10 AM
        Review Scope. Organisation. NSW Schedule and Constraints on Electronics 20m
        Speaker: Stephanie Ulrike Zimmermann (Albert-Ludwigs-Universitaet Freiburg (DE))
        Slides
      • 9:35 AM
        NSW Electronics Overview 20m
        including latency
        Speaker: Lorne Levinson (Weizmann Institute of Science (IL))
        Slides
      • 10:00 AM
        Background and Luminosity Requirements. Hit Rates 20m
        Speaker: Daniel Lellouch (Weizmann Institute of Science (IL))
        Slides
      • 10:25 AM
        Coffee 10m
      • 11:00 AM
        MM Frontend Bord 30m
        Speaker: Kenneth Johns (University of Arizona (US))
        Slides
      • 12:15 PM
        Lunch 1h
      • 1:15 PM
        sTGC Frontend Board 30m
        Speaker: Liang Han (Univ. of Science & Tech. of China (CN))
        Slides
      • 2:45 PM
        Grounding Strategy and EMC 20m
        Speaker: John Nathaniel Oliver (Harvard University (US))
        Slides
      • 3:25 PM
        Coffee 15m
      • 3:45 PM
        FEB ASICs: TDS 20m
        Speaker: Jinhong Wang (University of Michigan (US))
        Slides
      • 4:15 PM
        FEB ASICs: ART 20m
        Speaker: Sorin Martoiu (IFIN-HH Bucharest (RO))
        Slides
      • 5:15 PM
        Reviewers' Closed Session 1h
    • 9:00 AM 7:00 PM
      Tuesday 10 February: On-detector Electronics 60/6-015 - Room Georges Charpak (Room F)

      60/6-015 - Room Georges Charpak (Room F)

      CERN

      20
      Show room on map
      • 9:00 AM
        sTGC Router 20m
        Speaker: Xueye Hu (Umich)
        Slides
      • 10:00 AM
        sTGC pad trigger 20m
        Speaker: Riccardo Vari (Universita e INFN, Roma I (IT))
        Slides
      • 10:45 AM
        Coffee 15m
      • 11:00 AM
        L1DDC Card 20m
        Speaker: Theodoros Alexopoulos (National Technical Univ. of Athens (GR))
        Slides
      • 12:00 PM
        Lunch 1h 10m
      • 1:15 PM
        MM ADDC Card 20m
        Speaker: Lin Yao (Brookhaven National Laboratory (US))
        Slides
      • 2:15 PM
        LV Power 20m
        Speaker: Dante Amidei (University of Michigan (US))
        Slides
      • 3:30 PM
        Coffee 15m
      • 3:45 PM
        VMM3 Readout and ROC ASIC Requirements/Specs 20m
        Speakers: Lorne Levinson (Weizmann Institute of Science (IL)) , Sorin Martoiu (IFIN-HH Bucharest (RO))
        Slides
      • 5:15 PM
        Reviewers' Closed Session 1h
    • 9:00 AM 5:30 PM
      Friday 13 February: Trigger Processors 40/S2-D01 - Salle Dirac

      40/S2-D01 - Salle Dirac

      CERN

      30
      Show room on map
      • 9:00 AM
        NSW Trigger Processor Overview 30m
        overview of NSW trigger system; interface to sector logic incl. data format, replication; compatibility with phase 2; Latency; project organization incl. schedule and responsibilities
        Speaker: Joao Barreiro Guimaraes Da Costa (Harvard University (US))
        Slides
      • 10:00 AM
        sTGC Interface and Trigger Algorithm 20m
        incl. performance and testing
        Speaker: Julia Narevicius (Weizmann Institute of Science (IL))
        Slides
      • 10:45 AM
        Coffee 15m
      • 11:00 AM
        MicroMegas Interface and Trigger Algorithms 20m
        including performance and testing
        Speaker: David Lopez Mateos (Harvard University (US))
        Slides
      • 11:40 AM
        Lunch 1h
      • 12:40 PM
        Ancillary Functions 20m
        Speaker: Lorne Levinson (Weizmann Institute of Science (IL))
        Slides
      • 1:20 PM
        Hardware Platforms: LAr/Stony Brook Option 20m
        Speaker: John David Hobbs (State University of New York (US))
        Slides
      • 1:55 PM
        Hardware Platform: SRS/Bucharest Option 20m
        Speaker: Sorin Martoiu (IFIN-HH Bucharest (RO))
        Slides
      • 2:30 PM
        Hardware Selection Criteria 20m
        Speaker: Joao Barreiro Guimaraes Da Costa (Harvard University (US))
        Slides
      • 3:15 PM
        Reviewers' Closed session 1h