MultiCore R&D Meeting

Europe/Zurich
32/1-A24 (CERN)

32/1-A24

CERN

40
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Present: Marc, Giulio, Lorenzo, Pere, Xin, Kate, V. Marc introduced his work. Followed discussion about sharing memory between processes. Marc is working on a factory model. Pere propose some sort of wrapping malloc or default allocator in a transaction model. Marc will present his prototype at next meeting (in two weeks) Giulio described his work in CMS. Use perfctr on AMD. main finding: 1) CMS code: a lot of code, trash of instruction cache. 2) speed up factor 10 since last year: 10 times less instruction, processor used worse... current activities Big library: report in two weeks different malloc 20% improvements lower priorities in CMS Lorenzo reported on minuit (already presented at the OpenLab Multi-thread workshop end of may: MPI version developed by BaBar Lorenzo migrating to OpenMP works going on also on Genetic-algos Pere is working on multiprocessing in Python: two modules exits processing and parallel-pyhon He will circulate a talk he has prepared for LHCb Xin introduced his new work on multi-threaded G4. Main problem in G4 is that the same class contains both long-living components common to all events and and short-living components that shall be assigned to each single thread. More next meeting (Gene will be visiting CERN at that time Kate introduced her plan of work of using perfmon to reproduce Lassi/Giulio performance measurements on our INTEL multicore machine. She plan to write a generic python script that can be then used also for other applications. Later she plan to analyze code and start producing examples of code that best exploit multicore architecture even in single-threaded applications. Next meeting July 3 Actions VI: establish a mailing-list VI: find an indigo home NN: compile a list of allocators and memory managers NN: investigate the development of a tool to check the lifetime of memory blocks and how they are shared among processes
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