Jun 5 – 10, 2016
Padova, Italy
Europe/Rome timezone

ATLAS Level-1 Topological Trigger Performance

Jun 10, 2016, 9:30 AM
Centro Congressi (Padova)

Centro Congressi


Oral presentation Trigger Systems Trigger 2


Marek Palka (Jagiellonian University (PL))


The LHC will collide protons in the ATLAS detector with increasing luminosity through 2016, placing stringent operational and physical requirements to the ATLAS trigger system in order to reduce the 40 MHz collision rate to a manageable event storage rate of 1 kHz, while not rejecting interesting physics events. The Level-1 trigger is the first rate-reducing step in the ATLAS trigger system with an output rate of 100 kHz and decision latency smaller than 2.5 μs. It consists of a calorimeter trigger, muon trigger and a central trigger processor. During the LHC shutdown after the Run 1 finished in 2013, the Level-1 trigger system was upgraded including hardware, firmware and software updates. In particular, new electronics modules were introduced in the real-time data processing path: the Topological Processor System (L1Topo). It consists of a single AdvancedCTA shelf equipped with two Level-1 topological processor blades. They receive real-time information from the Level-1 calorimeter and muon triggers, which is processed by four individual state-of-the-art FPGAs. It needs to deal with a large input bandwidth of up to 6 Tb/s, optical connectivity and low processing latency on the real-time data path. The L1Topo firmware includes measurements of angles between jets and/or leptons and of many other kinematic variables based on lists of selected or sorted trigger objects that need to be done within 200 ns. Over one hundred VHDL algorithms are producing trigger outputs and are incorporated into the logic of the central trigger processor, responsible of generating the Level-1 acceptance signal. The addition of the new selections in Level-1 will improve the ATLAS physics reach in a harsher collision environment. The system has been installed and commissioning started during 2015 and will be continued during 2016. As part of the firmware commissioning, the physics output from individual algorithms needs to be simulated and compared with the hardware response. An overview of the commissioning process and the early impact on physics results with the new L1Topo system will be illustrated.

Primary author

Marek Palka (Jagiellonian University (PL))


Jose Guillermo Panduro Vazquez (Royal Holloway, University of London)

Presentation materials