Jun 5 – 10, 2016
Padova, Italy
Europe/Rome timezone

Error Field Measurement and Processing with FPGA in KTX Active Control System

Jun 10, 2016, 10:30 AM
2h
Centro Congressi (Padova)

Centro Congressi

Padova

Poster presentation Data Acquisition Poster Session 2

Speaker

Mr Xiaotian Guo (University of Science and Technology of China)

Description

In the Keda Torus for eXperiment (KTX) device, it is necessary to suppress error field of slit zone and flange which can improve the quality and stability of plasma discharge. This paper introduced an new active control system which can reduce error field of vertical gap in KTX. The advantage of the active control system was to implement the matrix algorithm calculation using FPGA in real time which has lower latency than implementing it in the software on computer. The system contained $16$ Rogowski coils to detect dynamic eddy current signals of copper shells near the vertical gap. The $16$-channel signal was digitalized by high-speed ADCs after passing through two-stage amplifiers and high-frequency filtering parts. Then we conducted matrix algorithm calculation in FPGA to get the feedback voltage value from the output of ADCs and stored the results in the DDR$2$. Finally, the FPGA sends the calculation results to the coil control module through RS-$485$ or network in real time. Additionally, the matrix parameters of FPGA calculating program were adjusted by the computer through USB or Ethernet. Under the operation of active control system, we made comparison between the measurement result and the magnitude of error field of the original system. Result indicated that the error field of vertical gap in KTX device was reduced, and the system could successfully achieve fast matrix calculation in real time within a few latency.

Primary author

Mr Xiaotian Guo (University of Science and Technology of China)

Co-authors

Mr Kezhu Song (University of Science and Technology of China) Mr Tianbo Xu (University of Science and Technology of China)

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