Dr Albert Aguilar (I3M)
We present the implementation of novel methods to accurately determine the gamma ray impact position within monolithic scintillation crystals in PET systems. These methods are implemented in a Kintex7 FPGA installed in each ADC board of the data acquisition system (DAQ) of the brain PET insert named MINDView. Improving the system processing capabilities is of particular interest when high data transfer rates are expected, as is the case of this scanner. Algorithms such as Center of Gravity (CoG) allow to determine the gamma photon impact coordinates based on the addition of the input signals weighted by their own coordinates and normalized to the energy. Assuming the use of monolithic black-painted crystals where the light distribution is well preserved, this method has several known weaknesses since the light distribution is truncated at the crystal edges, which causes a misplacement of the true impact coordinates. Other approaches have been studied to minimize the CoG limitations. Among them, the so-called Rise to the Power (RTP) algorithm or Fitting methods to the light distribution. These methods help to better estimate the center of the light distribution and, thus, to better determine the photon impact position including regions near the detector edges. PET systems typically suffer from the parallax error, especially near borders of the FOV. This effect can be mitigated by determining the photon Depth of Interaction (DOI) inside the crystal which can be estimated when monolithic crystals are considered. Correcting the parallax error in the reconstruction stage (the true Lines of Response) improves the final image spatial resolution at the FOV borders. Either RTP or Fitting methods have been already tested off-line with promising results. This means analyzing raw data in a PC workstation once the acquisition is completed. The results showed quantitative improvements in the position determination and, therefore, in the final image quality. Both methods permitted to estimate the photon DOI. The aim of this work is to show the results obtained when these methods are implemented in an FPGA and, therefore, executed on-line, reducing the total amount of data transferred to the computer, also improving the data bandwidth. The bottleneck is the execution time of this process, which must be below the expected data rate (1M event/s), fixing the restriction of 750ns (a bit lower than the 1us expected). The current implementation with CoG takes around 700ns (DSP-based), being very close to the allowed limit. Assuming the new methods are more complex in terms of computation requirements, other approaches are needed to match the times. The RTP method and the DOI estimation have been simulated in the XC7K160T. Their implementation is based on LUTs and dividers, changing the current approach. The stages of multiplications, additions and divisions have been grouped, giving times below 500ns. The different methods will be compared in terms of performance (byte length, truncation factor, time execution, logic resources…) and, the best one in terms of time and resources, will be implemented in the ADC board of the MINDView DAQ system.
Dr Albert Aguilar (I3M)