Jun 5 – 10, 2016
Padova, Italy
Europe/Rome timezone

High-speed continuous DAQ system for reading out the ALICE SAMPA ASIC

Jun 7, 2016, 3:00 PM
1h 30m
Centro Congressi (Padova)

Centro Congressi


Poster presentation Poster session 1


Mr Arild velure (IFT, University of Bergen, Norway) Dr Ganesh J. Tambave (IFT, University of Bergen, Norway)


The heavy-ion beam of CERN's LHC is expected to be colliding at 50 kHz (present rate ~ few kHz) during Run3 onwards of the ALICE experiment planned to start in 2020. Due to these new high collision rates, the Multi-Wire Proportional Chambers of the present ALICE TPC will be replaced by readout chambers featuring Gas Electron Multiplier (GEM) foils. A continuous readout system will replace the existing triggered readout. In continuous readout, the signals from the GEMs will be processed by Front-End Cards each consisting of five custom-made SAMPA ASICs and GigaBit Transceivers (GBTx). Every SAMPA ASIC has 32 signal processing channels, each containing a charge-sensitive pre-amplifier, a shaper, a 10 bit 10 MHz ADC and a digital filter, processing and compression chain. The output of the SAMPA is multiplexed and transmitted using GBTx via optical links to a Common Readout Unit (CRU). The CRU is an interface to the on-line computer farm, trigger and detector control system. The first prototype of the SAMPA ASIC with three channels was recently produced. To test its performance, a continuous data acquisition system was developed using an Altera System-on-Chip development board with Cyclone-V FPGA. A custom board was designed for the SAMPA to mount directly on the FPGA board. Data packets from the SAMPA are read out over a GigaBit Ethernet link provided by the FPGA board. The data samples are then stored in ROOT files as well as being analyzed in real-time using the CERN ROOT data analysis framework to monitor the data quality. To control, configure, and monitor the SAMPA and the FPGA board, a software-package with a graphical user interface was developed. The data acquisition system was successfully used for testing the three channel readout and is also easily scalable to 32 channels using data compression capabilities of the SAMPA chip. The presentation will give an overview of the readout-system design and its performance tests with SAMPA coupled to the GEM detector prototype.

Primary authors

Mr Arild velure (IFT, University of Bergen, Norway) Dr Ganesh J. Tambave (IFT, University of Bergen, Norway)

Presentation materials