Jun 5 – 10, 2016
Padova, Italy
Europe/Rome timezone

Emulation of a prototype FPGA track finder for the CMS Phase-2 upgrade with the CIDAF emulation framework

Jun 7, 2016, 3:00 PM
1h 30m
Centro Congressi (Padova)

Centro Congressi

Padova

Poster presentation Upgrades Poster session 1

Speaker

Luigi Calligaris (STFC - Rutherford Appleton Lab. (GB))

Description

The CMS collaboration is preparing a major upgrade of its detector, so it can operate during the high luminosity run of the LHC (HL-LHC) from 2025. The upgraded tracker electronics will reconstruct the trajectories of charged particles within a latency of a few microseconds, so that they can be used by the level-1 trigger. An emulation framework, CIDAF, has been developed to provide a reference to a proposed FPGA-based implementation of this track finder, which employs a Time-Multiplexed (TM) technique for data processing.

Primary author

Luigi Calligaris (STFC - Rutherford Appleton Lab. (GB))

Presentation materials