5–9 Jul 2016
<a href=http://www.sfpalace.com/>Palace Hotel San Francisco</a>
America/Los_Angeles timezone

Tailoring High-Voltage, High-Current Thyristors for Very High Frequency Switching

8 Jul 2016, 15:30
15m
Gold Ballroom (Palace Hotel San Francisco)

Gold Ballroom

Palace Hotel San Francisco

Oral Presentation Opening, Closing, and Solid State Switches Oral 12

Speaker

Howard Sanders (Silicon Power Corporation)

Description

Many applications exist requiring high voltage switching in the tens of kilohertz rates with peak currents at the thousands of amps and blocking voltage at the thousands of volts. High-voltage, high-current thyristors provide low forward voltage and high peak current rating versus active area but suffer from long recovery times. To achieve high frequency operation would have required the use of gate turn off thyristors. Switch modules using series connected gate-turn-off thyristors require additional circuitry and isolated power floating at each device gate potential rather than the more compact thyristor based switch modules operating at lower frequency which do not need to use gate-turn-off. Tailoring the thyristor for faster turn-on also achieves a device with faster recovery. Using these devices we have developed a compact thyristor based switch module capable of achieving greater than 20 kHz pulse rates using only a single low voltage, low power trigger. In present form the module is designed for a maximum blocking voltage of 7.5 kV and a peak current of 3 kA. However, this concept could be easily used to generate higher voltage switches using more devices in series. Also, higher current devices are in development which would increase the peak current rating to 14 kA without a significant increase in the size of the module. Higher current can also be achieved using devices in parallel. This paper will discuss the tailoring of the thyristor, the design of the switch module, and test results showing fast turn-on of greater than 100 kV/µsec and 25 kA/µsec as well as recovery times of less than 10 µsec.

Primary authors

Howard Sanders (Silicon Power Corporation) Mr John Waldron (Silicon Power Corporation)

Presentation materials

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Peer reviewing

Paper