2.5Gb/s Simple Optical Wireless Communication System for Particle Detectors in High Energy Physics (in session "POSTER")
6-Bit Low Power Area Efficient SAR ADC for CBM MUCH ASIC (in session "POSTER")
65nm Receiver with Decision Feedback Equalization for Radiation Hard Data Link at 5Gbps (in session "POSTER")
A 1.2 Gb/s Data Transmission Unit in CMOS 0.18 $\mu m$ technology for the ALICE Inner Tracking System front-end ASIC. (in session "ASIC")
A fast, ultra-low power 10-bit SAR ADCs in CMOS 130 nm technology (in session "ASIC")
A flexible FPGA based QDC and TDC for the HADES and the CBM calorimeters (in session "Systems, Planning, installation, commissioning and running experience")
A Fully Monolithic HV-CMOS Pixel Detector with a Time-to-Digital Converter for Nanosecond Time Measurements (in session "POSTER")
A generic software component enabling communication between IP-Bus and OPC-UA (in session "WG 1")
A High Bandwidth and Versatile Advanced MC Board, TRB_v1 (in session "POSTER")
A High-Speed DAQ Framework for Future High-Level Trigger and Event Building Clusters (in session "POSTER")
A Low-Power 10 Gbps Serial Link Transmitter ASIC for Particle Detectors in 65nm CMOS (in session "POSTER")
A Low-Power 10-bit 250-MS/s Dual-Channel Pipeline ADC in 0.18 µm CMOS (in session "POSTER")
A Low-Power and Low Transmission Latency Dual Channel Serializer ASIC for Detector Front-End Readout (in session "POSTER")
A micro-TCA based data acquisition system for the triple-GEM detectors for the upgrade of the CMS forward muon spectrometer (in session "Systems, Planning, installation, commissioning and running experience")
A Neural Network on FPGAs for the z-Vertex Track Trigger in Belle II (in session "POSTER")
A New Profibus-DP Slave Interface Card for CERN’s Vacuum Sector Valve Controller (in session "POSTER")
A New Readout Electronics for the LHCb Muon Detector Upgrade. (in session "POSTER")
A PCI DAQ Board Prototype after the ATLAS Pixel Detector IBL-Layer 1 and 2 ROD Cards (in session "POSTER")
A Prototype for an Artificial Retina Processor Aimed at Reconstructing Tracks at the LHC Crossing Rate (in session "POSTER")
A Prototype of a New Generation Readout ASIC in 65nm CMOS for Pixel Detectors at HL-LHC (in session "ASIC")
A Silicon Strip Telescope for Prototype Sensor Characterisation Using Particle Beam and Cosmic Rays (in session "POSTER")
A synchronous analog very front-end in 65nm CMOS with local fast ToT encoding for pixel detectors at HL-LHC (in session "ASIC")
A System-Level Model for High-Speed, Radiation-Hard Optical Links in HEP Experiments Based on Silicon Mach-Zehnder Modulators (in session "POSTER")
A Temperature Compensated Triple-path PLL for DUNE Experiments (in session "POSTER")
A Universal FMC-Based DAQ System (in session "POSTER")
A Versatile Small Form Factor Twisted-Pair TFC FMC for mTCA AMCs (in session "POSTER")
Adaption of Low Cost Safety COTS MCU For Low Level Radiation Applications in Accelerator Facilities (in session "POSTER")
ALICE Inner Tracking System Readout Electronics Prototype Testing with the CERN “Giga Bit Transceiver” (in session "POSTER")
ALICE Trigger System in RUN3 (in session "POSTER")
AM06: the Associative Memory chip for the Fast TracKer in the upgraded ATLAS detector (in session "Plenary")
An Advanced Power Analysis Methodology Targeted to the Optimization of a Digital Pixel Readout Chip Design and its Critical Serial Powering System (in session "POSTER")
An FPGA based track finder at Level 1 for CMS at the High Luminosity LHC (in session "Trigger")
Application of flash-based field-programmable gate arrays in high energy experiments (in session "Radiation tolerant components and systems")
ASPIC and CABAC: Two ASICs to Readout and Pilot CCD (in session "POSTER")
ATLAS Phase-II-Upgrade Pixel Data Transmission Development (in session "POSTER")
Back-end implementation of the VELOPIX ASIC using the 130nm Mixed Signal Design kit (in session "WG 2 Microelectronics User Group")
Characterization of ALICE SAMPA ASIC Using Prototype GEM Detector for LHC Run3 and Beyond (in session "POSTER")
Characterization of Radiation Effects in 65nm Digital Circuits with the DRAD Digital Radiation Test Chip (in session "POSTER")
Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications (in session "POSTER")
Characterization of the Column-Based Priority Logic Readout of Topmetal-II- CMOS Pixel Direct Charge Sensor (in session "POSTER")
CMOS Image Sensors in Harsh Radiation Environments (in session "Invited Talk")
Component Qualification for the Mu2E Calorimeter Wafeform Digitizer (in session "POSTER")
Data Acquisition System for the CALICE AHCAL Calorimeter (in session "Systems, Planning, installation, commissioning and running experience")
Design and Performance of the Phase I Upgrade of the CMS Global Trigger (in session "POSTER")
Design and test performance of the ATLAS Feature Extractor trigger boards for the Phase-1 Upgrade (in session "Trigger")
Design of a Depleted Monolithic CMOS Sensor in a 150 nm CMOS Technology for the ATLAS Inner Tracker Upgrade (in session "POSTER")
Design of a Radiation Tolerant System for Total Ionizing Dose Monitoring Using Floating Gate and RadFET Dosimeters (in session "POSTER")
Design of an AdvancedTCA board Management Controller Solution (in session "WG 1")
Design of an AdvancedTCA board Management Controller Solution (in session "POSTER")
Design Studies for the Phase II Upgrade of the CMS Barrel Electromagnetic Calorimeter (in session "POSTER")
Development of 32-Channel System for Processing Asynchronous Data from the CBM GEM Detectors (in session "POSTER")
Development of a monolithic pixel detector with SOI technology for ILC vertex detector (in session "ASIC")
Development of a Rest Gas Ionisation Profile Monitor for the CERN Proton Synchrotron Based on a Timepix3 Pixel Detector (in session "POSTER")
Development of ATLAS Liquid Argon Calorimeter Readout Electronics for the HL-LHC (in session "Systems, Planning, installation, commissioning and running experience")
Development of Clock-Data Recovery circuit, Serializer and CML Driver in 65nm CMOS for HL-LHC pixel readout chip (in session "POSTER")
Development of Network Interface Cards for TRIDAQ Systems with the NaNet Framework (in session "POSTER")
Development of Radiation-Hard Bandgap Reference Circuit in CMOS 130 nm Technology (in session "POSTER")
Development of the ABCStar front-end chip for the ATLAS Silicon Strip Upgrade (in session "ASIC")
Developments of two 4 × 10-Gbps radiation-tolerant VCSEL array drivers in 65 nm CMOS (in session "ASIC")
Digital Readout Board for CMS and TOTEM Precision Proton Spectrometer Timing Upgrade Project (in session "POSTER")
Discussion (in session "WG 1")
Electronics for the RICH Detectors of the HADES and CBM Experiments (in session "POSTER")
Europractice EDA tools for the HEP community: 2016 update (in session "WG 2 Microelectronics User Group")
Europractice IC fabrication & IC design services (in session "WG 2 Microelectronics User Group")
Evaluation of GPUs for High-Level Triggers in High Energy Physics (in session "Trigger")
Fabrication of the first 3D Vertical JFET at the IMB-CNM (in session "Power, grounding and shielding")
FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework (in session "Systems, Planning, installation, commissioning and running experience")
First experimental results with TOFPET2 ASIC (in session "ASIC")
First Implementation of a Two-Stage DC-DC Conversion Powering Scheme for the CMS Phase-2 Outer Tracker (in session "POSTER")
First results of the front-end ASIC for the strip detector of the PANDA MVD (in session "ASIC")
First studies on AMS H35 CMOS devices for application in the ATLAS tracker upgrade (in session "Radiation tolerant components and systems")
Flex Based Data and Power Transmission for the ATLAS Pixel Upgrade (in session "POSTER")
FPGA Based Algorithms for the New Trigger System for the Phase 2 Upgrade of the CMS Drift Tubes Detector (in session "POSTER")
FPGAs in radiation: Recent results from Artix7 (in session "WG 3")
FPGAs in radiation: Recent results from Kintex7 (in session "WG 3")
FPGAs in radiation: Recent results from SmartFusion2 (in session "WG 3")
Front-End and Back-End Solutions in the CBM STS Readout ASIC (in session "POSTER")
GBT based readout in the CBM experiment (in session "Systems, Planning, installation, commissioning and running experience")
GBT-FPGA tutorial (in session "WG 3")
HARDROC3, a 3rd generation ASIC with zero suppress for ILC Semi Digital Hadronic Calorimeter (in session "ASIC")
HDI Flexible Front-End Hybrid Prototype for the PS Module of the CMS Tracker Upgrade (in session "POSTER")
HEPS-BPIX, the hybrid pixel detector system for High Energy Photon Source in China (in session "ASIC")
High Performance Measurement Application in MTCA.4 (in session "Tutorial")
High Precision, Low Disturbance Calibration of the High Voltage System of the CMS Barrel Electromagnetic Calorimeter (in session "POSTER")
High speed electrical transmission line design and characterisation (in session "Optoelectronics and Links")
Highlights and Trends of Detector Instrumentation and Technology Development in Germany (in session "Opening and Local Talks")
HVCMOS Sensors for the High Luminosity Upgrade of ATLAS Experiment: The Second Generation of Prototypes and their Electronic Blocks (in session "POSTER")
IC-PIX28: Pixel Detectors Read-Out in Bulk-CMOS 28nm (in session "ASIC")
Implementation of the data acquisition system for the Overlap Modular Track Finder in the CMS experiment (in session "POSTER")
Installation, Commissioning, and Running of the ATLAS Fast Tracker Hardware System (in session "Plenary")
Integrated Input Protection Against Discharges for Micro Pattern Gas Detectors Readout ASICs (in session "POSTER")
Integration and Testing of the DAQ System for the CMS Phase 1 Pixel Upgrade (in session "POSTER")
Introduction (in session "WG 3")
Invisibility Cloaking of Metal Contacts on Solar Cells and LEDs (in session "Local Talks")
KAPTURE-2 – A picosecond sampling system for individual THz pulses with high repetition rate (in session "Systems, Planning, installation, commissioning and running experience")
L-1 Trigger System for Electromagnetic Calorimeter of COMET Experiment (in session "POSTER")
LDQ10P: A Compact Low-Power 4x10 Gb/s VCSEL Driver Array IC (in session "POSTER")
Lessons Learned in High Frequency Data Transmissions Design (in session "POSTER")
MATRIX: a 15 ps resistive interpolation TDC ASIC based on a novel regular structure (in session "ASIC")
MEMS Sensors: Enabler for the IoT (in session "Invited Talk")
MGPA++ A Pre-Amplifier for CMS Barrel ECAL at HL-LHC (in session "POSTER")
Microsemi radiation tolerant FPGAs (in session "Invited Talk")
MTCA.4 Basics - Introduction in xTCA (in session "Tutorial")
MTCA.4 Tutorial and Life Demo (in session "Tutorial")
Multiple Use SiPM Integrated Circuit (MUSIC) for SiPM Anode Readout (in session "POSTER")
Neural hardware architectures for spatio-temporal data processing (in session "Invited Talk")
News on Foundry Access Services via CERN (in session "WG 2 Microelectronics User Group")
On-detector electronics for the LHCb VELO upgrade (in session "Systems, Planning, installation, commissioning and running experience")
Open Discussion (in session "WG 2 Microelectronics User Group")
Opening (in session "Opening and Local Talks")
Optical Link for Detector Instrumentation: In-Detector Multi-Wavelength Silicon Photonic Transmitter (in session "Optoelectronics and Links")
Particle Physics in Germany (in session "Opening and Local Talks")
PCIe and PCIe Hot Swap under Linux in MTCA systems (in session "Tutorial")
Performance and Advantages of a Soft-Core Based Parallel Architecture for Energy Peak Detection in the Calorimeter Level 0 Trigger for the NA62 Experiment at CERN (in session "POSTER")
Performance and Operation of the Calorimetric Trigger Processor of the NA62 Experiment at CERN SPS (in session "POSTER")
Performance of CATIROC: ASIC for Smart Readout of Large Photomultiplier Arrays (in session "POSTER")
PETIROC2A, a 32-channel 20 GHz GBW readout ASIC for accurate time resolution and precise charge measurements (in session "ASIC")
Phase 1 Upgrade of the CMS Drift Tubes Read-Out System (in session "POSTER")
Phase 1 Upgrade of the CMS Forward Calorimeter (in session "POSTER")
Pixel Architectures in HV/HR CMOS Process for ATLAS Inner Detector Upgrade (in session "POSTER")
Precision Electronics for a System of Custom MCPs in the TORCH Time of Flight Detector (in session "POSTER")
Precision Timing with PbWO Crystals and Prospects for a Precision Timing Upgrade of the CMS Barrel Electromagnetic Calorimeter at HL-LHC (in session "POSTER")
Present and future xTCA developments in CMS DAQ group (in session "WG 1")
Processing of the Liquid Xenon Calorimeter’s Signals for Timing Measurements (in session "POSTER")
Properties of Thin Polyurethane Wire Bond Coatings after Irradiation (in session "POSTER")
Proposal of a specification for ATCA shelves used in experiments at CERN (in session "WG 1")
ProtoPRM: An FPGA-Based High Performance Associative Memory Pattern Recognition Mezzanine (in session "Trigger")
Prototype Readout Electronics for the ALICE Inner Tracking System (in session "POSTER")
Prototypes and tests of the LHCb Scintillating Fiber detector front end electronics. (in session "Systems, Planning, installation, commissioning and running experience")
Pulsar IIb Design, System Integration and Next-Generation Full Mesh ATCA Backplane Test Results (in session "POSTER")
Rad-hard DCDC converters for HL-LHC experiment's tracker modules power distribution (in session "Plenary")
Radiation hard High-Speed Optical Links for HEP (in session "Invited Talk")
Radiation Hardened by Design, Low Jitter, 2.56 Gbps LVDS/SLVS Based Receiver in 65 nm CMOS (in session "POSTER")
Radiation tolerant issues for LHC accelerator (in session "Invited Talk")
RD53: Radiation hard 65nm Macro Cells, Libraries and simulation models (in session "WG 2 Microelectronics User Group")
Readout and Trigger for the AFP Detector at ATLAS Experiment (in session "POSTER")
Readout Channel with Majority Logic Timestamp and Digital Peak Detector for Muon chambers of the CBM Experiment (in session "POSTER")
Readout Electronics for Silicon Micro-Strip Sensors (in session "POSTER")
Real Time FPGA Design for the L0 Trigger of the RICH Detector of the NA62 Experiment at CERN SPS (in session "Trigger")
Reliability and failure mechanisms of Integrated Circuits and devices (in session "Tutorial")
SALT Readout ASIC for Upstream Tracker in the Upgraded LHCb Experiment (in session "ASIC")
SAMPA Chip: the New ASIC for the ALICE TPC and MCH Upgrades (in session "ASIC")
Serial Powering Pixel Stave Prototype for the ATLAS ITk upgrade (in session "Power, grounding and shielding")
Simulation Environment Based on the Universal Verification Methodology (in session "POSTER")
Single Event Effects Mitigation with TMRG Tool (in session "POSTER")
SKIROC2_CMS : an ASIC for testing CMS HGCAL (in session "ASIC")
SLVS Transmitter and Receiver for Readout ASIC (in session "POSTER")
Software and Firmware co-development using High-level Synthesis (in session "Programmable Logic, design tools and methods")
SPIDR, a General-Purpose Readout System for Pixel ASICs (in session "POSTER")
Spotting and Curing Noise Issues in the Silicon Vertex Detector of the Belle II Experiment (in session "POSTER")
Study of Hardware Implementation of Fast Tracking Algorithms (in session "POSTER")
System-Level Considerations of the Front-End Readout ASIC in the CBM Experiment from the Power Supply Perspective (in session "POSTER")
Test Strategies for Industrial Testers for Converter Controls Equipment (in session "POSTER")
Testing and Integration of the Service Cylinders for the CMS Phase 1 Pixel (in session "POSTER")
Testing of Hybrid Circuits for the CMS Tracker Upgrade of Front-End Electronics (in session "POSTER")
The 10G TTC-PON: Challenges, Solutions and Performance (in session "Optoelectronics and Links")
The Accelerators of the FAIR Project (in session "Local Talks")
The Address in Real Time Data Driver Card for the Micromegas Detector of the ATLAS Muon Upgrade (in session "POSTER")
The ARAGORN Front-End - FPGA Based Implementation of a Time-to-Digital Converter (in session "POSTER")
The ATLAS Level-1 Topological Trigger Design and Operation in Run-2 (in session "Systems, Planning, installation, commissioning and running experience")
The CMS Barrel Muon Trigger Upgrade (in session "Trigger")
The CMS Electron and Photon Trigger for the LHC Run 2 (in session "POSTER")
The CMS Level-1 Calorimeter Trigger for LHC Run II (in session "Plenary")
The Common Data Acquisition Platform in the Helmholtz Association (in session "POSTER")
The KATRIN experiment - the most precise scale for neutrinos (in session "Local Talks")
The Level-1 Tile-Muon Trigger in the Tile Calorimeter Upgrade Program (in session "POSTER")
The MuPix Telescope – A Thin, High Rate Particle Tracking Telescope (in session "POSTER")
The Next Generation Front-End Controller for the Phase 1 Upgrade of the CMS Hadron Calorimeters. (in session "POSTER")
The SoLid anti-neutrino detector's read-out system (in session "Systems, Planning, installation, commissioning and running experience")
The Trigger Readout Electronics for the Phase-I Upgrade of the ATLAS Liquid Argon Calorimeters (in session "Trigger")
The upgrade of the CMS hadron calorimeter with silicon photomultipliers (in session "Systems, Planning, installation, commissioning and running experience")
The use of ATCA in CMS at the HL-LHC (in session "WG 1")
The VeloPix ASIC (in session "Plenary")
The Versatile Link Demonstrator Board (VLDB) (in session "POSTER")
Tile Rear Extension Module for the Phase-I Upgrade of the ATLAS L1Calo PreProcessor System (in session "POSTER")
TOFFEE: a fully custom amplifier-comparator chip for timing applications with silicon detectors. (in session "Plenary")
Total Ionizing Dose effects on a 28nm Hi-K metal-gate CMOS technology up to 1 Grad (in session "Radiation tolerant components and systems")
Upgrades to the CSC Cathode Strip Chamber Electronics for HL-LHC (in session "POSTER")
Using MaxCompiler for High Level Synthesis of Trigger Algorithms (in session "Programmable Logic, design tools and methods")
uTRiG: A Mixed Signal Silicon Photomultiplier Readout ASIC for Ultra-Fast Timing and Ultra-High Rate Applications (in session "POSTER")
Versatile ASIC and Protocol Tester for STS/MUCH-XYTER2 in CBM Experiment (in session "POSTER")
Versatile Link PLUS Transceiver Development (in session "Optoelectronics and Links")
Versatile Transceiver Production and Quality Assurance (in session "POSTER")
Web-Based DAQ Systems: Connecting the User and Electronics Front-Ends (in session "POSTER")
Welcome (in session "WG 1")
Welcome from KIT (in session "Opening and Local Talks")
Welcome from Local Organizers (in session "Opening and Local Talks")
Include materials from selected contributions
