TWEPP 2016 - Topical Workshop on Electronics for Particle Physics

Session

Programmable Logic, design tools and methods

LOGIC

Sep 27, 2016, 9:50 AM

Conveners

Programmable Logic, design tools and methods

• Magnus Hansen (CERN)

117. Using MaxCompiler for High Level Synthesis of Trigger Algorithms

Sioni Paris Summers (Imperial College Sci., Tech. & Med. (GB))

9/27/16, 9:50 AM

Logic

Oral

Firmware for FPGA trigger applications at the CMS experiment is conventionally written using hardware description languages such as Verilog and VHDL. MaxCompiler is an alternative, Java based, tool for writing FPGA applications and removes some of the need for electronics expertise. This provides potential to lower the barrier for contribution to firmware design. An implementation of the jet...

54. Software and Firmware co-development using High-level Synthesis

Nikhil Pratap Ghanathe (University of Florida (US))

9/27/16, 10:15 AM

Logic

Oral

Accelerating trigger applications on FPGAs (using VHDL/Verilog) in CMS experiments at LHC-CERN warrants consistency between each trigger firmware and its corresponding C++ model. This tedious and time consuming process of convergence is exacerbated during each upgrade study. High-level synthesis, with its promise of increased productivity and C++ design entry bridges this gap exceptionally...