Short Baseline Neutrino Detector (SBND), which is a 260-ton LAr TPC as near detector in Shot Baseline Neutrino (SBN) program, consists of 11,264 TPC readout channels. As an enabling technology for noble liquid detectors for neutrino experiments, cold electronics developed for extremely low temperature (77K–89K) decouples the electrode and cryostat design from the readout design. With front-end electronics integrated with detector electrodes, the noise is independent of the fiducial volume and about half as with electronics at room temperature. Digitization and signal multiplexing to high speed serial links inside cryostat results in large reduction in the quantity of cables (less outgassing) and the number of feed-throughs, therefore minimizes the penetration and simplifies the cryostat design. Being considered as an option for the TPC readout, several Commercial-Off-The-Shelf (COTS) ADC chips have been identified as good candidates for operation in cryogenic temperature after initial screening test. Because of hot-electron effects on CMOS device lifetime, one candidate, ADI AD7274 fabricated in TSMC 350nm CMOS technology, has been used to conduct lifetime study in cryogenic temperature. The lifetime study includes two phases, the exploratory phase and the validation phase. This paper will describe the test method, test setup, observations in exploratory phase, and the lifetime projection that will be concluded with the test results in the validation phase.