Speaker
Description
In order to implement the driver function for several types of scientific CCD detector, decreasing the size of electronics of CCD detector system, an ASIC chip of CCD driver is designed. It provides multi-channel clocks and bias voltage, called BCDA (Bias Clock Driver ASIC). In the BCDA chip, clock drivers and bias drivers have different designs.
For the different level requirements of bias voltage, two bias drivers are designed: one is to use low-voltage MOS transistors to design the bias voltage which is less than 5V; another is to use the high-voltage LDMOS transistors to design the bias voltage which is great than 5V. The high-voltage bias has the design with 8-bit current DAC and operational amplifier. The adjustable output range is from 8V to 30v.
A clock switch using rail-to-rail operations with the output range from 0V to 16V is designed to generate the clocks. Two different 8-bit current DACs are used to adjust the driver capability of clocks and the upper rail’s voltage of clocks. And two clock drivers with driving capability of different orders of magnitude are designed.
The design of the chip has been finished using the Global Foundry 180nm BCDlite technology and taken into tape-out. During the conference, we will report the detail design and final test result.
| Minioral | Yes |
|---|---|
| Speaker | Yi Feng |
| Institute | USTC |
| Country | China |
