In this work we show a method to reduce the number of signals to be processed from a detector block for gamma ray imaging. There have been investigations towards reducing the number of signals in order to specially decrease system costs. Anger logic is one of widest used approach, since it reduces the number of photosensor signals to only 4. Other approaches result into two projections, reducing the number of signals to the number of rows and columns in the photosensor array.
We show here a two-steps reduction scheme without degradation of the detector performance. On one step, we merge signals at the center and laterals of the detector block where less sampling is typically required. The goal is to feed the signals into an Application Specific Integrated Circuits (ASIC). Most of them have a number of input channels varying from 16 to 64. The current approach allows one to reduce the 144 signals of an array of 12x12 photosensors to only 64, keeping a good system performance regarding spatial, energy and timing resolution. On a second reduction step, a further reduction is applied by projecting the already reduced signal into X and Y projections. In the particular case of an array of 12x12 photosensors, only 8+8 signals are finally obtained.
We present data to compare the performance of gamma ray detector blocks with and without these reduction methods. We have evaluated spatial, energy and now also timing capabilities. Moreover, we have applied this method to monolithic and crystal arrays.
|Institute||Universitat Politècnica de València|