The FEB(front end board) configuration test board is developed aiming at the requirement of testing the new generation ASIC chips and its configuration system for ATLAS NSW(New Small Wheel) upgrade, this research studies the configuration of the key chips on the FEB–VMM3 and TDS2 using GBT-SCA, develops multiple level standards and communication protocol, and verifies the whole data link. It provides technical reference for prototype FEB key chip configuration and data readout, as well as the final system configuration.
The FEB configuration data is transmitted to FEB by the control room through L1DDC (L1 Data Driver Card). The communication between L1DDC and FEB adopts E-link communication protocol, and the interface adopts the miniSAS connector. The configuration functions that NSW needs to be completed by configuring each piece of FEB for Micromegas and sTGC detectors, each board should be equipped with GBT-SCA ASIC. A total of 1536 pieces of FEB for sTGC detectors, and A total of 4096 pieces of FEB for Micromegas detectors should be configured.
The FEB configuration test board realizes the operation and control of the SCA chip, including E-link, SPI, I2C, GPIO communication, implements the configuration of VMM3 and TDS2, while verifying the TDS2 4.8Gbps High-speed data transfer function. The test results show that the technology can meet requirements of the future configuration of FEB, and the FEB configuration test board also conducted electronic integration test in CERN, it completed communication with Pad trigger and Router board.
|Description||FEB test board|