In order to optimise its physics reach in the LHC Run3, for the years 2020 and beyond, the LHCb Collaboration decided to re-optimise the detector and the data acquisition system. The new detector will operate at the LHC bunch-crossing frequency of 40~MHz, without a first level hardware trigger. The implementation of the data-acquisition and of the online computing system for the software trigger are challenging, since of the expected data rate to manage amounts to about 40~Tb/s.The system can be built at an affordable cost only by using of-the-shelf hardware as much as possible. However, technologies available evolve very quickly, thus the system architecture has to be flexible enough to avoid too strong bounds to a specific technology, and let us free to choose it until the last moment. We present the system architecture, the different implementation options we are studying along with measurements from these studies and will explain the decision criteria and technology drivers for choosing the components for the final system.