The upgraded High Luminosity LHC, after the third Long Shutdown (LS3) will provide an instantaneous luminosity of 7.5 10**34 cm-2 s-1 (levelled), with a pileup of up to 200 interactions per bunch crossing. During LS3, the CMS Detector will undergo a major upgrade to prepare for the Phase-2 of the LHC physics program, starting around 2026.
The upgraded CMS detector will be read out at an unprecedented data rate of up to 50 Tb/s with an event rate of 750 kHz, selected by the level-1 hardware trigger, and an average event size of 7.5 MB. Complete events will be analysed by the High Level Trigger (HLT) using software algorithms running on standard processing nodes, and selected events will be stored permanently at a rate of up to 7.5 kHz for offline processing and analysis.
Tis paper will present, the baseline design of the DAQ and HLT systems for Phase-2, taking into account the projected evolution of high speed network fabrics for event building and distribution, and the anticipated performance of general purpose CPU. Implications on hardware and infrastructure requirements for the DAQ "data center" are analysed. Emerging technologies for data reduction are considered.
Novel possible approaches to event building and online processing, inspired by trending developments in other areas of computing dealing with large masses of data, are also examined.
Furthermore, opportunities offered by reading out and processing parts of the detector data at the machine bunch crossing rate (40 MHz), wherever the front-end electronics allows, are discussed.