The Phase-2 ATLAS ITk Pixel Upgrade

12 Dec 2017, 11:00
20m
Conference Center (Okinawa Institute of Science and Technology Graduate University (OIST))

Conference Center

Okinawa Institute of Science and Technology Graduate University (OIST)

OIST, Onna, Okinawa 904-0495, Japan
ORAL Large scale applications Session6

Speaker

Leonardo Rossi (Sezione di Genova)

Description

The entire tracking system of the ATLAS experiment will be replaced in 2025 during the LHC Phase-II shutdown by an all-silicon detector called the “ITk” (Inner Tracker). The innermost part of ITk will be a pixel detector containing about 12.5m2 of sensitive silicon. The silicon modules are arranged on 5 layers of stave-like support structures in the most central region and ring-shaped supports in the endcap regions covering out to |η| < 4; a mid-eta region (~1 < |η| < ~2) will be occupied by novel inclined support structures which keep the angle of incidence of high-momentum tracks more closely normal to the sensitive silicon. All supports will be based on low mass, highly stable and highly thermally-conductive carbon-based materials cooled by evaporative carbon dioxide flowing in thin-walled titanium pipes. An extensive prototyping programme, including thermal, mechanical and electrical studies, is being carried out on all the types of support structures.
The HL-LHC is expected to deliver up to 4000fb-1 of Integrated Luminosity; the outer 3 layers of the Pixel Detector must be designed to cope with this level of background radiation but the innermost 2 layers of the detector will be replaced after about 2000 fb-1.
The ITk pixel detector will be instrumented with new sensors and readout electronics to provide improved tracking performance and radiation hardness compared to the current detector. The innermost layer will be populated with 3D-silicon sensors due to their increased radiation hardness and also lower power consumption, which eases thermal demands on the support structures; other layers will use thin planar silicon sensors. Sensors will be read out by new ASICs based on the chip currently being developed by the RD53 Collaboration. The readout chips will be thinned to 150μm or even less to save material.
Servicing the detector reliably within the limited space available, and without introducing excessive amounts of material, is a significant challenge. Data cables must be capable of handling up to 5 Gb/s and must be electrical in nature within the volume of the pixel detector; conversion to optical signals will take place at larger radii where the radiation background is less intense. Serial powering has been chosen as the baseline for the ITk pixel system as it minimises service cable mass; extensive testing is being carried out to prove its feasibility. Attention must also be paid to grounding and shielding in the detector to mitigate cross-talk and common mode noise.
Most of the baseline technological decisions will be taken this year in view of the ITk Pixel TDR to be completed by the end of 2017.
The speaker will present an overview of all of the above.

Primary authors

Leonardo Rossi (Sezione di Genova) Jo Pater (University of Manchester (GB)) on behalf of the ATLAS ITk Collaboration

Presentation materials