Name: Flash-based FPGAs and Synthesis Techniques for safety-critical application
Start: 2016-10-19T09:00:00+02:00
End: 2016-10-19T17:00:00+02:00
Location: CERN

Flash-based FPGAs and Synthesis Techniques for safety-critical application

Wednesday, 19 October 2016 - 09:00
CERN (30/7-018)

: Sessions

: Talks

: Breaks

19 Oct 2016

09:00	Welcome and introduction - Mr Andreas Schwarztrauber (Business Development Manager, ARROW) Mr Philipp Jacobsohn (Staff Application Consultant, Synopsys) Mr Jens Hüttemann (Senior FAE, Microsemi) Mr Guy Nallatamby (FAE, Arrow Electronics ) (30/7-018 - Kjell Johnsen Auditorium)
10:15	--- Coffee break ---
10:35	Synopsys design flow for Microsemi devices - Mr Philipp Jacobsohn, (Staff Application Consultant, Synopsys) (30/7-018 - Kjell Johnsen Auditorium)

12:00	--- Lunch break ---
14:00	Debug, verification and tool/flow certification with Synopsys - Mr Philipp Jacobsohn (Staff Application Consultant, Synopsys) (30/7-018 - Kjell Johnsen Auditorium)
15:15	--- Coffee break ---
15:35	Using Smart Debug for failure insertion, Q&A - Mr Philipp Jacobsohn (Staff Application Consultant, Synopsys) Mr Jens Hüttemann (Senior FAE, Microsemi) (30/7-018 - Kjell Johnsen Auditorium)