CRU Weekly Meeting

Europe/Zurich
CERN

CERN

CRU Weekly meeting (26 October 2016)

Present: Alex, Shuaib, Jubin, Sanjoy, Tivadar, mazsi, Erno

Secretary: Erno(11), PiPPo(7), Shuaib(1), mazsi(5)

Actions:

  • CRU Questionnaire - Communicate with detector groups where information still missing.

Report on Actions:

  • CRU Questionnaire - We sent out a reminder last week and now we have 7 answer out of 10.
  • Kolkata - The remote server is accessible only from the CERN IP range. Each person requires its own account.
  • CERN - The Altera devkit is installed in the CRU server. Curently the JTAG goes over the wifi which is slow but it will be replaced with a wired JTAG server.
  • LHCb PCIe40 - Mazsi successfully managed to download and test a small design on one of the remotely available LHCb's PCIe40. The second board is still not accessible.

1. 10G PON

  • Mazsi is consulted with an Altera support engineer about the 2UI error. Now the issue is forwarded to an Altera timing expert.
  • The porting of 10G PON design from Attila to Altera board is in progress.
  • Mazsi tried to communicate with the new trigger firmware for the KC705 board (which is based around the IP bus protocol), but the initial UDP based register test failed (probably the register mapping configuration is not correct)

2. GBT

  • Erno - The GBT bypass and interconnect feature has been tested successfully on Attila card. But in the new integrated design it is causing huge timing issues (large level of combinatorial logic).
  • New x36 design for PCIe40 based on the latest clocking scheme (1 ATX PLL, local PCLK buffers, etc). To be tested remotely on the LHCb's PCIe40 cards.

3. DCS

  • Sanjoy integrated the I2C block to the PCIe DMA design and managed to "talk" with the onboard Si5341 clock generator (register reads and writes).

4. PCIe

  • Initially (last week) the DMA performed well on the Altera devkit (as before on the Attila board) but now the performance is degraded. The exact issue is not known, it is under investigation.
  • Firmware flash on the Attila board - The serial mode writing failed. In parallel mode the programming is OK, but during the power-on boot the firmware is not loaded properly from the flash. On the Altera devkit, the flash writing and the booting is as expected.

5. Integration

  • No news.

AOB:

  • Shuaib - The expected delivery date for the PCIe40 PCBs from Micropack is the second or third week of November. The component purchase is in progress in VECC.

Vacations:

  • Mazsi: will work from Wigner/Budapest between 15-23 November (with some free days)
  • PiPPo: On leave until 7 November (but can work remotely).
  • Erno: On leave 1-7 November.
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