3-8 September 2017
The Open University, Milton Keynes, UK.
Europe/London timezone

Simulation and characterisation of low gain avalanche detector for particle physics and synchrotron applications

7 Sep 2017, 12:40
1h 50m
Hub Theatre (OU) ()

Hub Theatre (OU)

The Open University, Walton Hall, Milton Keynes, MK7 6AA

Speaker

Dr Richard Bates (University of Glasgow (GB))

Description

Low Gain Avalanche detectors (LGAD) are a type of Avalanche Photodiode with gain of approximately ten. LGADs have a very fast
response time, order of picoseconds, and excellent position resolution. This makes them useful in many applications, including tracking for particle physics and synchrotron applications. Coupling of LGAD devices to single photon counting pixel electronics enables detection of incident X-rays of energy below the electronics’ noise threshold, making them of interest to the Synchrotron community.

This work presents results of TCAD detector simulations, device fabrication and characterisation.
Synopsis TCAD software was employed to simulated the device from fabrication process to final detector response and calculation of gain. Modelling started with the detailed simulation of the fabrication process, followed by the modelling of the detector’s electrical properties, the detector’s response to incident radiation and finally its gain.
The dependency of the gain on the device’s doping profiles was determined. The simulations demonstrated the influence of the fabrication process on the doping profiles and therefore gain.

Devices with optimised parameters obtained from simulation, and standard no-gain sensors, were fabricated at Micron Semiconductor Ltd. These were
characterised using laser and alpha particle Transient Current Technique (TCT) for charge
collection, gain variation and sensitivity.
The results presented here concentrate on those obtained from devices fabricated in Run 2.
The first devices (Run 1) saw a small amount of gain. The simulation was modified to match these
results and new simulations performed to optimize the devices (Run 2). These devices have
shown to match, within error, the simulated results for both current-voltage and gain measurements.
Preliminary results show a gain between 3 and 6 is obtained for voltages in the range of 200-800V.
Further device optimization in simulation is presented, which produces higher gain and allows
operation with higher bias voltages.

Primary authors

Dr Richard Bates (University of Glasgow (GB)) Neil Moffat (University of Glasgow (GB))

Co-authors

Leyre Flores Sanz De Acedo (University of Glasgow (GB)) Dima Maneuski (University of Glasgow) Nicola Tartoni Mr Mark Bullough (Micron Semiconductor Ltd)

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