The CMS Phase-I Pixel detector DAQ system relies on custom and standard microTCA parts. The combination of the robust online software and firmware development during 2018 operation made it possible towards a smooth and efficient data taking for the Pixel detector. We developed several complex software techniques to deal with the regular data-taking problems as they appeared. A significant...
This presentation will describe the ASIC and readout system designed for the new pixel vertex detector (VELO) of the upgraded LHCb experiment. All elements of the new electronics readout chain will be designed to cope with the requirement of 40 MHz full event readout rate. The pixel sensors are equipped with the VeloPix ASIC and placed at 5 mm from the beam in a secondary vacuum tank and...
A serially powered pixel detector is the baseline choice for the High Luminosity upgrade of the inner tracker of the CMS experiment. A serial power distribution scheme, compared to parallel powering, requires less cable mass, offers higher power efficiency and is less susceptible to voltage transients. A prototype pixel readout chip has been designed for serial powering in 65nm CMOS technology...
During operation at instantaneous luminosities of up to 2 10^34/cm^2/s the
frontend chips of the ATLAS innermost pixel layer (IBL) experienced single
event upsets affecting its global registers as well as the settings for
the individual pixels, causing, amongst other things loss of occupancy,
noisy pixels, and silent pixels. A quantitative analysis of the single event
upsets as well as...
