24–26 Apr 2018
CERN
Europe/Zurich timezone
There is a live webcast for this event.
CALL FOR ABSTRACT FOR POSTERS : 1st April 2018

The Drift Tubes Test Stand for Phase-2 Upgrade

24 Apr 2018, 08:20
2m
80/1-001 - Globe of Science and Innovation - 1st Floor (CERN)

80/1-001 - Globe of Science and Innovation - 1st Floor

CERN

60
Show room on map

Speaker

Andrea Triossi (Centro de Investigaciones Energéti cas Medioambientales y Tecno)

Description

In view of the installation of a prototype of the Phase-2 on-detector electronics during the long shutdown of LHC in 2018, a demonstrator of the full trigger and readout chain was built in the CMS site.It consists of a DT (Drift Tubes) chamber equipped with a single FPGA hosting 138 TDCs with 1ns resolution that timestamp the hits collected from the frontend analog discriminators. The hits are then moved through high-speed links (10Gbps) towards the backend that is responsible for buffering the data and trigger generation.

Summary

Considerable enhancements are foreseen for the electronics of the Drift Tube muon detector of CMS in view of High Luminosity LHC. On-detector electronics will be made simpler and more robust since all the intelligence and complexity of the trigger generation will be moved in an environment without radiation. Off-detector electronics, on the other hand, will be able to work on raw (less elaborated) data that will give the freedom of applying more complex algorithm allowing for a better bunch crossing identification and a better spatial resolution of the trigger primitives. In view of the installation of a prototype of such electronics during the long shutdown of LHC in 2018, a demonstrator of the full trigger and readout chain was built in the CMS site. Such demonstrator is designed for being a test stand for different hardware from the frontend to the backend electronics. Its modularity make it easy to evolve at the same peace of the electronics towards LS3. It consists of a DT (Drift Tubes) chamber equipped with a full trigger and readout chain. As a first step the Phase 1 upgrade backend electronics has been used for qualifying a demonstrator of the onboard Phase-2 electronics. A Virtex7 FPGA hosting 138 TDCs (1ns resolution) was used to timestamp the hits collected from the frontend analog discriminators. The hits are then moved through high-speed links (10Gbps) towards the backend that is responsible for buffering the data and trigger generation. The triggered data are readout with the CMS standard acquisition chain until the data storage on disk. The next step in the evolution of the setup will be the substitution of the front end FPGA with a prototype of the OBDT (OnBoard electronics for Drift Tubes) board that will be built around a flash-based FPGA (Microsemi Polarfire).

Primary author

Andrea Triossi (Centro de Investigaciones Energéti cas Medioambientales y Tecno)

Co-authors

Alvaro Navarro Tobar (Centro de Investigaciones Energéti cas Medioambientales y Tecno) David Daniel Redondo Ferrero (Centro de Investigaciones Energéti cas Medioambientales y Tecno) Jose Manuel Cela Ruiz (Centro de Investigaciones Energéti cas Medioambientales y Tecno) Paolo De Remigis (Universita e INFN Torino (IT)) Francesco Rotondo (Universita e INFN Torino (IT))

Presentation materials