Speaker
Description
Single muon triggers are crucial for the physics programmes at hadron collider experiments. The poster presents the concept for a novel muon trigger system, which exploits data from precision chambers like drift-tube chambers. Two example implementations are provided: the future muon trigger of the ATLAS experiment at the HL-LHC and the muon trigger of the baseline detector for the FCC-hh. A detailed description of fast-track reconstruction algorithms is also provided. The baseline system is based on the use of modern FPGA technology with an embedded microprocessor for floating point operations (System-on-Chip).
Summary
Single muon triggers are crucial for the physics programmes at hadron collider experiments. To be sensitive to electroweak processes, single muon triggers with transverse momentum thresholds down to 20 GeV and dimuon triggers with even lower thresholds are required. In order to keep the rates of these triggers at an acceptable level these triggers have to be highly selective, i.e. they must have small accidental trigger rates and sharp trigger turn-on curves. The muon systems of the LHC experiments and experiments at future colliders like FCC-hh will use two muon chamber systems for the muon trigger, fast trigger chambers like RPCs with coarse spatial resolution and much slower precision chambers like drift-tube chambers with high spatial resolution. The data of the trigger chambers are used to identify the bunch crossing in which the muon was created and for a rough momentum measurement while the precise measurements of the muon trajectory by the precision chambers are ideal for an accurate muon momentum measurement. In our presentation, we shall describe the concept for such a trigger system for two examples: the future muon trigger of the ATLAS experiment at the HL-LHC which will employ this scheme and the muon trigger of the baseline detector for the FCC-hh. We shall include a detailed description of fast track reconstruction algorithms that needed to be developed for the muon trigger. We shall discuss the choice of the trigger hardware where we favour an FPGA based system with an embedded microprocessor for floating point operations. The conceptual studies are based on LHC collision data, simulated data, and results from laboratory tests and test-beam campaigns with demonstrator hardware for such a trigger system.
