24–28 Jun 2018
Sundsvall
Europe/Zurich timezone

Characterization of LVDS drivers for MAPS detector designed in 180 nm SOI CMOS technology

26 Jun 2018, 16:00
1h
Quality Hotel, Folkets Hus (Sundsvall)

Quality Hotel, Folkets Hus

Sundsvall

Esplanaden 29 Sundsvall, Sweden

Speaker

Mr Tomas Benka (1) Faculty of Electrical Engineering, Czech Technical University in Prague; 2) Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague)

Description

The Low-Voltage Differential Signaling (LVDS) drivers for the X-ray imaging pixel detector X-CHIP-03 have been developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. The X-CHIP-03 is a Monolithic Active Pixel Sensor (MAPS) and its architecture is based on the first prototype X-CHIP-02 with hit counting. The advantages, design, features, test structures and measurements of the first prototype X-CHIP-02 fabricated in SOI CMOS technology have already been published [1, 2].
The applicability of the X-CHIP-02 has been found for many commercial applications, for example the imaging detectors in medicine industry, detectors for dosimetry and spectroscopy, tracking detectors, etc. However, all of them require to improve the speed of data acquisition from the detector. The communication speed and its radiation resistance is the one of the most important parameters of the detector. The X-CHIP-02 communication consists of long shift register daisy chaining all pixels. This architecture limits the maximum data rate below 50 kbps. The LVDS transceiver and receiver allow to increase the speed of communication to 500 Mbps, Figure 1, with respect to low power consumption (6 mW) and radiation resistance. The motivation for development the LVDS IP block is the utilization of the detector in the commercial application. The LVDS receiver and transmitter are included in the X-CHIP-03 detector. The design of the LVDS IP blocks, as well as circuit simulation, laboratory measurement technology are described. The experimental results are of great importance for further development of the LVDS communication with radiation tolerance design which is intended for MAPS sensors in SOI technology.

[1] T. Benka, M. Havranek et al., 2018 Characterization of pixel sensor designed in 180 nm SOI CMOS technology JINST 13 C01025
[2] M. Havranek et al., 2017 MAPS sensor for radiation imaging designed in 180 nm SOI CMOS technology, proceeding from IWORID 2017, submitted to JINST

Primary author

Mr Tomas Benka (1) Faculty of Electrical Engineering, Czech Technical University in Prague; 2) Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague)

Co-authors

Mr Gordon Neue (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague) Dr Jiri Jakovenko (Faculty of Electrical Engineering, Czech Technical University in Prague) Mr Lukas Tomasek (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague) Mr Maria Marcisovska (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague) Mr Martin Hejtmanek (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague) Dr Michal Marcisovsky (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague) Dr Miroslav Havranek (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague) Mr Peter Svihra (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague) Dr Vaclav Vrba (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague) Mr Zdenko Janoska (Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University in Prague)

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