24–28 Jun 2018
Sundsvall
Europe/Zurich timezone

Comparative analysis of the readout front-end electronics implemented in deep submicron technologies.

26 Jun 2018, 16:00
1h
Quality Hotel, Folkets Hus (Sundsvall)

Quality Hotel, Folkets Hus

Sundsvall

Esplanaden 29 Sundsvall, Sweden

Speaker

Piotr Kmon (AGH UST Krakow)

Description

There are two principal approaches for the detector signal processing in the front-end electronics: a charge integration (used in CCDs, CMOS imagers, etc.) and a single photon counting (SPC). Nowadays, hybrid pixel detectors with fast readout electronics operating in the SPC mode are becoming increasingly popular in the development of X-ray imaging systems. This is mainly because of their advantages like a very high dynamic range (compared to the integration type detectors), noiseless imaging (a discriminator with properly set threshold cuts off the noise and counts only the hits whenever pulse amplitude is sufficiently high) and the possibility of counting photons only within a given energy window (in systems with two or more discriminators). However, the main disadvantages of the SPC operating detectors in comparison to charge integration type systems are their worse spatial resolution and worse capability of coping with high photon fluxes. Though, many prominent groups worldwide put much effort to minimize gap among SPC and charge integration systems as it may highly improve current X-ray imaging systems performance. The possible solution to increase both spatial resolution and count-rate performance of the SPC systems is to use modern nanometer processes for integrated electronics fabrication. It is however known that mainly the digital part of the pixel can be efficiently downscaled with a possible small risk of their parameters degradation. Analogue blocks may often be scaled down only at the expense of their parameters.
Therefore, based on our experience [1, 2] and currently realized project, we will present comparative analysis of two modern deep submicron CMOS processes, i.e. 40 nm and 28 nm in terms of design of the front-end electronics dedicated to detector signal fast processing. Authors will present considerations about the design of the readout front-end electronics dedicated for high-count rate applications and their limitations, with the emphasis on:
- input noise of the system,
- power consumption,
- speed of input pulses counting,
- area occupied by a front-end electronics.

Primary authors

Piotr Kmon (AGH UST Krakow) Mr Rafał Kłeczek (AGH UST Krakow)

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