CMS ETL timing ASIC mini-workshop

US/Central
Fermilab, One EAST conference room (first floor)
Description

Location:  Fermilab Wilson Hall, One East conference room

    • 08:30 08:45
      Introduction 15m
      Speakers: Tiehui Ted Liu (Fermi National Accelerator Lab. (US)), Tiehui Ted Liu (Fermi National Accelerator Lab. (US))
    • 08:45 09:15
      Everything you want to know about LGAD but afraid to ask 30m
      Speaker: Nicolo Cartiglia (INFN Torino (IT))
    • 09:15 09:45
      Front-end electronics optimization for time tagging with Ultra-Fast Silicon Detectors 30m
      Speakers: Federico Fausti (Universita e INFN Torino (IT)), Nicolo Cartiglia (INFN Torino (IT))
    • 09:45 10:00
      Past and current ASIC design activities related to ETL timing ASIC 15m
      Speaker: Ping Gui (Southern Methodist University (US))
    • 10:00 10:15
      Past and current ASIC design activities related to ETL timing ASIC 15m
      Speakers: Jingbo Ye (Southern Methodist University, Department of Physics), Jingbo Ye (Southern Methodist University (US))
    • 10:15 10:30
      coffee break 15m
    • 10:30 11:20
      Conceptual Design for ETL timing ASIC and how to move forward 50m
      Speaker: Dr Gregory Deptuch (Fermilab )
    • 11:20 12:20
      Discussion and Summary 1h
      Speaker: Tiehui Ted Liu (Fermi National Accelerator Lab. (US))
    • 12:30 12:50
      Useful background material (Atlas Timing Detector status report) 20m

      This is a recent seminar on Atlas HGTD.

      Speaker: Tiehui Ted Liu (Fermi National Accelerator Lab. (US))