Real-time computing refers to applications that compute correct results but, and more importantly, applications that perform on-time. In addition to usual system constraints, real-time systems include timing constraints that need to be satisfied by the system in order to provide a safe computation. Designing such systems requires more attention and strict guarantees to ensure their safety. One of the key problems in the design is the schedulability problem. To test it, simulation-based tests have been defined. These tests require a safe interval bound to run the system under a given scheduling algorithm in order to conclude its schedulability. In this paper, we adopt a multi-phases computation model that differentiates between memory accesses and computations, together with the use of DMA engines allow to hide most memory access latencies behind computation times and enhance the performance of the system. And we propose the first safe bound on the simulation interval for any schedule generated by a deterministic and memoryless scheduler running on a mono-processor platform where tasks are composed of two independent phases: a memory phase where the program is prefetched into the local memory (scratchpad) from main memory or an I/O devices, and a computation phase where the task is executing on the processor without the need to access the main memory or an I/O devices.
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