CERN Accelerating science

Talk
Title	Hardware Acceleration Through FPGAs - Basic Concepts (lecture 1)
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Author(s)	Lopez, Giorgio (speaker) (CERN)
Corporate author(s)	CERN. Geneva
Imprint	2019-03-04. - 0:56:13.
Series	(Inverted CSC) (Inverted CERN School of Computing 2019)
Lecture note	on 2019-03-04T15:00:00
Subject category	Inverted CSC
Abstract	FPGAs are a more and more ubiquitous technology. They offer the benefits of fast, application-tailored hardware, typically associated with ASICs, while enabling fast prototyping, upgradability and low costs. This makes them an ideal ally in HEP computing, specifically in areas where high performance is needed and/or specifications and needs may vary. The lectures will focus on the intrinsic parallel processing characteristics of FPGAs, emphasizing how they can be exploited to implement data-intensive algorithms. Focus will also be put on concepts like hardware/software partitioning (very important to help the most performing parts of the systems in collaborating with the legacy CPU oriented codebase). A simple hands on exercises session will be added to let the students get acquainted with the main tools and the VHDL language.
Copyright/License	© 2019-2024 CERN
Submitted by	sebastian.lopienski@cern.ch