Sep 12 – 17, 2021
University of Birmingham
Europe/London timezone

A hybrid pixel detector with 4D information for dynamic synchrotron radiation applications

Sep 15, 2021, 12:55 PM
1m
Teaching and Learning Building (University of Birmingham)

Teaching and Learning Building

University of Birmingham

Edgbaston Campus University of Birmingham B15 2TT UK

Speaker

Wei Wei (IHEP, CAS, China)

Description

In this paper, a new concept of detector is proposed for dynamic synchrotron radiation applications. It is based on the conventional hybrid pixel detector architecture, while the readout chip is designed with hit-driven readout scheme rather than frame refreshing. Based on ToT (Time over Threshold) structure, each pixel can acquire 4D information, including 2D position, timing, and energy of every incoming photon. This not only enhances the detector timing performance to several tens of nanosecond compared to the typical millisecond by photon counting, but also enables the possibility of wide-band X-ray imaging while typical synchrotron radiation experiments usually only deal with monochrome energy.
The pixel readout chip, TETPIX, was designed using a CMOS 130nm technology and taped out with a full mask engineering run. It integrates a 64×32 pixel array with a pixel size of 150μm×150μm. The readout scheme is based on a “column-drain” architecture, that simultaneous incoming hits in every column will be sequentially readout controlled by a priority arbitrary logic in the pixel. The time stamps of both edges of ToT pulses will be latched in pixel registers, where the leading edge corresponds to the hit time and the difference between the both edges represents the energy. Data are readout by a high speed serializer off chip.
A sensor measures 1.92cm×1.92 cm was bump bonded with 2×2 readout chips, and the module was then wire bonded to a readout PCB. Preliminary test results on BSRF (Beijing Synchrotron Radiation Facility) showed that the module can achieve a energy resolution better than 20% in the full range of BSRF from 8keV to 16keV, and the timing performance was about 20ns with 50MHz clock frequency. With this capability, the fine architecture of the bunch crossing of the accelerator can clearly be seen. Other experiment results are also discussed in this paper.

Nationality China
Your name Wei Wei
email weiw@ihep.ac.cn
Title Dr
Institute IHEP, CAS

Primary authors

Wei Wei (IHEP, CAS, China) Mr Jie Zhang (IHEP, CAS) Ms Mujin Li (IHEP, CAS) Ms Shanshan Cui (IHEP, CAS) Mr Zhenjie Li (IHEP, CAS) Mr Xiaoshan Jiang (IHEP, CAS) Mr Kejun Zhu (IHEP, CAS) Mr Peng Liu (IHEP, CAS) Mr Zheng Wang (IHEP, CAS)

Presentation materials