Sep 12 – 17, 2021
University of Birmingham
Europe/London timezone

A congestion awareness and Fault-tolerance Readout Network ASIC for High-Density Electrode Array Targeting Neutrinoless Double-Beta Decay Search in TPC

Sep 15, 2021, 4:05 PM
Teaching and Learning Building (University of Birmingham)

Teaching and Learning Building

University of Birmingham

Edgbaston Campus University of Birmingham B15 2TT UK
poster Applications in Particle Physics Poster Session 3 (Applications in Particle Physics)


bihui you (Central China Normal University)


Among the current and planned experiments of neutrinoless double-beta decay (0νββ), the high-pressure gaseous TPC stands out for its excellent energy resolution, low radioactive background and good scalability. Moreover, high position resolution can be maintained with an appropriate charge readout scheme for TPC to further suppress the background through ionization imaging. A low noise sensor, Topmetal-S, is being developed which, even without gas gain, the energy resolution requirement could be met. To realize a ton-scale TPC, approximately 100,000 Topmetal-S need to be laid on a meter-sized plane with a pitch of 5~10mm. The one of greatest challenges is reliable high-density sensor readout. A readout network ASIC is implemented and will be integrated into Topmetal-S as a router. A sensor network is built by establishing local connection among nearby sensors to ensure the tightness and radioactive purity of the high-pressure TPC. As a node of the network, each sensor not only generates and transmits its own data, but also forwards data from nearby sensors, and data is finally transferred to the edge of the network and received by a computer.
The test results of the first porotype of readout network ASIC show that the risk of data loss increased in the nearby sensors of the fault sensors. In addition, if the sensor in the same line is hit four or more times, it will cause data loss. Therefore, this paper proposed a distributed, self-organizing, fault-tolerance, and congestion awareness readout network ASIC and a distributed, adaptive and fault-tolerance-XY routing algorithm. The simulation shows that the throughput of the readout network reaches 8252.16 Mbit/s and the latency of the network is less than 120 us. Then the design has been verified and tested on the FPGA. The ASIC is implementing on a 130 nm CMOS process now and submitted it in May 2021.

Nationality China
Title Mr
Your name you

Primary author

bihui you (Central China Normal University)

Presentation materials